SPRUJ69 December   2022 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features
    3. 1.3 Thermal Compliance
    4. 1.4 Reach Compliance
    5. 1.5 EMC, EMI, and ESD Compliance
  3. 2User Interfaces
    1. 2.1 Power Inputs
    2. 2.2 Power Input [J7_CP] with LED for Status [LD2_CP][LD3_CP]
      1. 2.2.1 Power Control [SW2_CP] with LED for Status [LD5_CP] [LD6_CP] [LD7_CP]
      2. 2.2.2 Power Budget Considerations
    3. 2.3 User Inputs
      1. 2.3.1 Board Configuration Settings [SW3_CP] [SW13_CP] [SW3_SOM]
      2. 2.3.2 Boot Configuration Settings [SW9_CP] [SW8_CP]
      3. 2.3.3 Reset Pushbuttons [SW7_CP] [SW6_CP] [SW5_CP] [SW4_CP]
      4. 2.3.4 User Pushbuttons [SW2] [SW11] [SW10] [SW1] [SW12] with User LED Indication [LD9] [LD8]
    4. 2.4 Standard Interfaces
      1. 2.4.1 Uart-Over-USB [J43_CP] [J44_CP] with LED for Status [LD10_CP] [LD11_CP]
      2. 2.4.2 Gigabit Ethernet [J35_CP] with Integrated LEDs for Status
      3. 2.4.3 USB3.1 Gen1 Interface [J5_CP]
      4. 2.4.4 USB2.0 Interface [J6_CP]
      5. 2.4.5 PCIe Card Slot [J8_CP]
      6. 2.4.6 Display Port Interfaces [J36_CP] [J37_CP]
      7. 2.4.7 MicroSD Card Cage [J49_CP]
      8. 2.4.8 Stereo Audio Interface [LINE-IN J38_CP, LINE-OUT J41B_CP, J40B_CP]
    5. 2.5 Expansion Interfaces
      1. 2.5.1 Heatsink [ACC3_SOM] with Fan Header [J15_CP]
      2. 2.5.2 CAN-FD Connectors
      3. 2.5.3 Camera Interfaces [J52_CP]
      4. 2.5.4 Automation and Control Connector [J50_CP]
      5. 2.5.5 ADC [J23_CP]
      6. 2.5.6 CSI-TX [J10_SOM]
      7. 2.5.7 Accessory Power Connector [J42_CP]
  4. 3Circuit Details
    1. 3.1 Top Level Diagram
    2. 3.2 Interface Mapping
    3. 3.3 I2C Address Mapping
    4. 3.4 GPIO Mapping
      1. 3.4.1 Power Monitoring
      2. 3.4.2 Shared Interfaces / Signal Muxing
      3. 3.4.3 Power Delivery Network (PDN)
      4. 3.4.4 Identification EEPROM
  5. 4Revision History

Board Configuration Settings [SW3_CP] [SW13_CP] [SW3_SOM]

Dip switches [SW3_CP] [SW13_CP] [SW3_SOM] are used to configure different options available on the EVM.

Table 2-4 Dip Switch [SW3_CP] [SW13_CP] EVM Configuration Settings

[SW2]

Position

Default

Function Description
SW3.1 OFF Octal-SPI Memory Selection

MUX to select between non-volatile Octal-SPI memory connected to the MCU_OSPI0 interface:

‘0’ (OFF) = xSPI Memory is selected

‘1’ (ON) = Octal-NAND is selected

SW3.2 ON Debug/Trace Enable

MUX to select between Debug/Trace (connected via MIPI 60 emulation interface) and variety of ‘other’ EVM features (1):

‘0’ (OFF) = ‘Other’ EVM features are selected/enabled

‘1’ (ON) = Debug/Trace is enabled to MIPI-60 emulation interface

SW3.[3:4] OFF: OFF USB Type C Mode Selection

Set Mode for USB Type C interface (USB0):

'00' (OFF/OFF) = DFP (Downstream Facing Port)

‘01’ (OFF/ON) = DRP (Dual Role Port)

‘1X’ (ON, Don’t Care) = UFP (Upstream Facing Port)

SW3.5 OFF PCIe0 Mode Selection Not used with J7AEP SOM
SW3.6 OFF PCIe1 Mode Selection

Set Mode for PCIe1 (2-Lane)

‘0’ (OFF) = Root Complex

‘1’ (ON) = End Point

SW3.7 ON IO Voltage for Serial Camera

Configures IO supply for Serial Camera interface.

‘0’ (OFF) = VCC_CSI_IO: 3.3V

‘1’ (ON) = VCC_CSI_IO: 1.8V

SW3.8 ON Expansion board Selection Switch is to be used on Expansion board. See specific expansion board User’s Guide for definition. Not used with J7AEP SOM
SW3.9 ON EVM Configuration EEPROM Write Protection

Sets EVM’s configuration EEPROM Write Protection

‘0’ (OFF) = Configuration EEPROM can be updated

‘1’ (ON) = Configuration EEPROM cannot be updated/protected

SW3.10 ON User Defined

User Define, maps to IO Expander Input

‘0’ (OFF) = User Defined

‘1’ (ON) = User Defined

SW13.1 OFF

Reserved / Test Mode

(Wait Reset)

Reserved, must set to ‘0’ (OFF) for normal EVM operation (only used in Test Mode)
SW13.2 OFF

Reserved / Test Mode

(Wait Reset)

Reserved, must set to ‘0’ (OFF) for normal EVM operation (only used in Test Mode)

Table 2-5 shows the J7AEP SOM configuration switches (SW3) to set the various functions on SOM.

Table 2-5 EVM Configuration Switch Function
Switch Name Default Function Operation
SW3.2 ON Watchdog Disable

Enable/Disable selection for PMIC Watchdog Timer:

‘0’ (OFF) = PMIC watchdog timer is enabled

‘1’ (ON) = PMIC watchdog timer is disabled (Default)

SW3.1 ON PMIC I2C Selection

MUX to select I2C Interface for PMICs:

‘0’ (OFF) = PMIC I2C to Ext header I2C (test mode only)

‘1’ (ON) = PMIC I2C to SoC WKUP I2C (Default)