6 Viterbi, Complex Math, and CRC Unit (VCU)

Todays advanced control systems, such as motor control and power applications, can benefit from intelligent management and communications to optimize efficient operation. Power line communications (PLC) has become an ideal solution for intelligent management since the existing infrastructure can be used cost effectively. Communicating data in noisy environments is very challenging and computationally intensive. A typical microcontroller running a control application at its limit cannot tolerate the additional burden of supporting power line communications, and may require an additional processor. To solve this problem, TI developed the VCU. The VCU is a tightly coupled fixed-point unit that improves performance of communications-based applications by a factor of roughly seven times. Additionally, cost savings are realized by eliminating the need for a separate processor. Besides communications, the VCU is very useful for general-purpose signal processing applications such as filtering and spectral analysis. For example, spectral analysis can be used to process motor vibration noise to determine the impact of vibration on a system, estimate the motor operating life, and calibrate the control loop to improve efficiency.

The VCU has been designed to be flexible in supporting various communications technologies. For the typical MCU, four key operations consume most of the processing power: Viterbi decoding, complex Fast Fourier Transform (FFT), complex filters, and Cyclical Redundancy Check (CRC). Using the hardware capabilities of the VCU, an application will significantly benefit by the increased performance over a software implementation. As an example, the performance contributions of each key operation are:

• Viterbi decoding is commonly used in baseband communications applications. The Viterbi decode algorithm consists of three main parts – branch metric calculation, add-compare-select (Viterbi butterfly), and traceback operation. With the VCU, the branch metric calculation can be completed in a single cycle (code rate = 1/2, and two cycles for code rate = 1/3). The Viterbi butterfly takes 2 cycles per stage, as compared to 15 cycles per stage without the VCU. The traceback takes 3 cycles per stage, as compared to 22 cycles per stage without the VCU.
• The complex FFT is used in spread spectrum communications, as well as many other signal processing algorithms. For a 16-bit fixed-point complex FFT the VCU only requires 5 cycles per stage, as compared to approximately 20 cycles per stage without the VCU.
• Complex filters are used to improve data reliability, transmission distance, and power efficiency, and are commonly used in other various signal processing applications. The VCU can perform a complex I and Q multiply with coefficients (four multiplies) in a single cycle, as compared to approximately 10 cycles without the VCU. In addition, the VCU can read/write the real and imaginary parts of 16-bit complex data to memory in a single cycle.
• CRC algorithms are used for verifying data integrity over large data blocks, communication packets, or code sections. The VCU can perform 8-bit, 16-bit, 24-bit, and 32-bit CRCs completely in the background, offloading the main C28x CPU. For example, the VCU can compute the CRC for a block length of 10 bytes in 10 cycles, as compared to approximately 250 cycles without the VCU. A CRC result register contains the current CRC and is updated each time a CRC instruction is executed. This simplifies the CRC calculations and access to the final CRC value.

Figure 6-1 VCU Performance Improvements Compared to Software-Only Implementations

Devices with the C28x+VCU add an extended set of registers and instructions to the standard C28x architecture, which are used to support the acceleration of communications-based algorithms. The additional registers are: nine result registers, two traceback registers, a configuration and status register, and a CRC result register. The VCU performs fixed-point operations using the same existing instruction set format, pipeline, and memory bus architecture as C28x.

Programming the VCU is made easy with TI’s C2000Ware software suite. TI provides a complete library of C-callable assembly functions. These functions are implemented using the VCU instruction set to optimize efficiency and minimize overhead. TI also provides higher-level functions to support PLC communications standards such as PRIME and G3.

Some devices utilize a dedicated cyclic redundancy check unit (VCRC) rather than the full featured VCU for applications not requiring Viterbi decoding or complex math support. This enhanced VCRC is an extension of the C28x CPU and it includes registers and instructions to support CRC algorithms. CRC algorithms provide a straightforward method for verifying data integrity over large data blocks, communication packets, or code sections. The VCRC can perform 8-bit, 16-bit, 24-bit, and 32-bit CRCs, and it is capable of computing the polynomial code checksum for a block length of 10 bytes in 10 cycles (a byte of data in a single cycle). For custom CRC polynomials the execution time increases to three cycles. A CRC result register contains the current CRC, which is updated whenever a CRC instruction is executed.