SPRY288C April 2020 – December 2021 TMS320C28341 , TMS320C28342 , TMS320C28343 , TMS320C28343-Q1 , TMS320C28344 , TMS320C28345 , TMS320C28346 , TMS320C28346-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F2802 , TMS320F2802-Q1 , TMS320F28020 , TMS320F280200 , TMS320F28021 , TMS320F28022 , TMS320F28022-Q1 , TMS320F280220 , TMS320F28023 , TMS320F28023-Q1 , TMS320F280230 , TMS320F28026 , TMS320F28026-Q1 , TMS320F28026F , TMS320F28027 , TMS320F28027-Q1 , TMS320F280270 , TMS320F28027F , TMS320F28027F-Q1 , TMS320F28030 , TMS320F28030-Q1 , TMS320F28031 , TMS320F28031-Q1 , TMS320F28032 , TMS320F28032-Q1 , TMS320F28033 , TMS320F28033-Q1 , TMS320F28034 , TMS320F28034-Q1 , TMS320F28035 , TMS320F28035-EP , TMS320F28035-Q1 , TMS320F28050 , TMS320F28051 , TMS320F28052 , TMS320F28052-Q1 , TMS320F28052F , TMS320F28052F-Q1 , TMS320F28052M , TMS320F28052M-Q1 , TMS320F28053 , TMS320F28054 , TMS320F28054-Q1 , TMS320F28054F , TMS320F28054F-Q1 , TMS320F28054M , TMS320F28054M-Q1 , TMS320F28055 , TMS320F2806 , TMS320F2806-Q1 , TMS320F28062 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28066-Q1 , TMS320F28067 , TMS320F28067-Q1 , TMS320F28069 , TMS320F28069-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28332 , TMS320F28333 , TMS320F28334 , TMS320F28335 , TMS320F28335-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S
The FINTDIV extended instruction set optimally supports fast division operations commonly found in adaptive control systems for scaling parameters based on a variable. All instructions execute in a single cycle and three types of integer division are supported (Truncated, Modulus, Euclidean) of varying data type sizes (16/16, 32/16, 32/32, 64/32, 64/64) in unsigned or signed formats. Truncated format is the traditional division performed in C language (where “/” is the integer, and “%” is the remainder); however, the integer value is non-linear around zero. Modulus and Euclidean formats are more appropriate for precise control applications because the integer value is linear around the zero point, and this avoids potential calculation hysteresis. Both the Modulus and Euclidean divisions are supported by C intrinsics, and the C28x compiler supports all three division formats for all data types. Since the FINTDIV uses the existing FPU register set to carry out the FINTDIV operations, there are no special considerations relating to interrupt context save and restore.
Operation | Number of Execution Cycles | Improvement (vs CPU) | |
---|---|---|---|
CPU (‘/’ C operator) | FINTDIV (intrinsics) | ||
i16/i16 Truncated | 52 | 16 | 3.3x |
i16/i16 Euclidean and Modulus | 56 | 14 | 4.0x |
u16/u16 | 56 | 14 | 4.0x |
i32/i32 Truncated | 59 | 13 | 4.5x |
i32/i32 Euclidean and Modulus | 63 | 14 | 4.5x |
i32/u32 Truncated | 37 | 14 | 2.6x |
i32/u32 Modulus | 41 | 14 | 2.9x |
u32/u32 | 37 | 12 | 3.1x |
i32/i16 Truncated | 60 | 18 | 3.3x |
i32/i16 Euclidean and Modulus | 64 | 16 | 4.0x |
u32/u16 | 38 | 13 | 2.9x |
i64/i64 Truncated (1) | 78 – 2631 | 42 | 1.9x – 62.6x |
i64/i64 Euclidean & Modulus (1) | 82 – 2635 | 42 | 2.0x – 62.7x |
i64/u64 Truncated (1) | 54 – 2605 | 42 | 1.3x – 62.0x |
i64/u64 Euclidean & Modulus (1) | 58 – 2609 | 42 | 1.4x – 62.1x |
u64/u64 (1) | 53 – 2548 | 42 | 1.3x – 60.7x |