1 Introduction

Real-time control systems require fast and efficient processing, with latency kept to a minimum in order to maintain stability and boost overall performance. In addition, the increasing sophistication of modern motor systems, power electronics, smart grid technology, robotics, and similar applications require the central processor to keep up with numerous tasks simultaneously.

The C2000 family of microcontrollers (MCUs) from Texas Instruments addresses these challenges with an array of integrated on-chip hardware math enhancements that dramatically increase the performance of the MCU in many real-time applications. The five key enhancements are:

• Floating-Point Unit (FPU)
• Control Law Accelerator (CLA)
• Trigonometric Math Unit (TMU)
• Fast Integer Division Unit (FINTDIV)
• Viterbi, Complex Math, and CRC Unit (VCU)

Figure 1-1 System Block Diagram with Math Enhancements

At the center of each C2000 MCU lies a fast fixed-point central processing unit (CPU) that on its own provides excellent 32-bit processing capabilities. The FPU provides seamless integration of floating-point hardware into the CPU. To augment this further, the CLA provides an independent floating-point CPU operating at the full speed of the device and it is designed to perform control law computations with minimal latency. This effectively doubles the raw computing capabilities of the device. The TMU provides hardware support for common trigonometric math functions, while the FINTDIV enables fast integer division operations. The VCU adds hardware support for communications, complex math, and CRC calculations. This paper provides an overview of each of these math enhancements.