SPRZ171T December 2004 – September 2020 SM320F2801-EP , SM320F2808-EP , TMS320F2801 , TMS320F2801-Q1 , TMS320F28015 , TMS320F28016 , TMS320F28016-Q1 , TMS320F2802 , TMS320F2802-Q1 , TMS320F2806 , TMS320F2806-Q1 , TMS320F2808 , TMS320F2808-Q1 , TMS320F2809 , TMS320F2809-Q1
Memory: Flash and OTP Prefetch Buffer Overflow
0, A on F2809 silicon
0, A on C280x silicon
0, A, B, C on F2801, F2802, F2806, F2808, and F2801x silicon
This advisory applies to code executing from flash or OTP with the flash prefetch buffer enabled. On ROM devices this applies to the ROM that replaces flash and OTP.
The flash prefetch buffer may overflow if a SBF or BF instruction is within eight 16-bit words preceding an operation using indirect or direct program-memory addressing. The window for which this can occur is shown below:
Address
Offset
0x0000 BF LSW (32-bit opcode)
0x0001 BF MSW or SBF (16-bit opcode)
--------------------------------------
0x0002 SBF/BF + 1 word //
0x0003 SBF/BF + 2 words //
0x0004 SBF/BF + 3 words // If an instruction within this window
0x0005 SBF/BF + 4 words // uses program-memory addressing, it
0x0006 SBF/BF + 5 words // can cause the flash prefetch buffer to
0x0007 SBF/BF + 6 words // overflow.
0x0008 SBF/BF + 7 words //
0x0009 SBF/BF + 8 words //
-------------------------------------
0x0010 SBF/BF + 9 words
Whether or not an overflow actually occurs depends on the instruction sequence, flash wait states and CPU pipeline stalls. If an overflow occurs it will result in execution of invalid opcodes. Instructions that use program-memory addressing are MAC/XMAC, DMAC/XMACD, QMACL, IMACL, PREAD/XPREAD and PWRITE/XPWRITE.
1. Hand-coded assembly:
Use the SB/B instructions instead of SBF/BF for code targeted to execute from flash or OTP. The SB/B instructions are more efficient in wait-stated memory so a performance improvement may also be seen. In addition, the –flash_prefetch_warn compiler option can be used to issue a warning if the assembly code violates this erratum.
2. Compiler-generated assembly:
Compiler versions prior to V15.12.0.LTS:
Use the compiler switch -me to force the compiler to generate SB/B instructions instead of SBF/BF instructions. In heavily wait-stated memory, the SB/B instructions are more efficient than SBF/BF. In SARAM, the SBF/BF instructions are more efficient. Therefore, this switch should be applied as follows:
The -me switch is available in C28x compiler v4.1.4 and later.
Compiler V15.12.0.LTS and later:
Indicate which functions will run from SARAM using the --ramfunc=on option or the _attribute_((ramfunc)). The compiler will only generate SBF/BF instructions within these functions.
The -me switch is deprecated and no longer has any effect.