Revision(s) Affected

0, A, B

Details

When the ADC conversions are initiated by any source of trigger in either sequential or simultaneous sampling mode, the first sample may not be the correct conversion result.

Workaround(s)

For sequential mode, discard the first sample at the beginning of every series of conversions. For instance, if the application calls for a given series of conversions, SOC0→SOC1→SOC2, to initiate periodically, then set up the series instead as SOC0→SOC1→SOC2→SOC3 and only use the last three conversions, ADCRESULT1, ADCRESULT2, ADCRESULT3, thereby discarding ADCRESULT0.

For simultaneous sample mode, discard the first sample of both the A and B channels at the beginning of every series of conversions.

User application should validate if this workaround is acceptable in their application.

The magnitude of error is significantly reduced by writing a 1 to the ADCNONOVERLAP bit in the ADCCTRL2 register, which only allows the sampling of ADC channels when the ADC is finished with any pending conversion. Typically, the difference between the first sample and subsequent samples, with ADCNONOVERLAP enabled, will be less than or equal to four LSBs.