SPRZ398K November 2012 – September 2024 DRA745 , DRA746 , DRA750 , DRA756
DSS LCD/DPI Out Field Reversal in Interlaced RGB Mode
High
Interlaced RGB is not supported on DSS DPI outputs (VOUT1/2/3) because the VSYNC signal's polarity is noncompliant.
Some monitors that are fully compliant will exhibit display artifacts. However, there are some monitors which accept the noncompliant signal without artifacts.
Use Interlaced YUV mode with embedded sync (BT.656, BT.1120).
SR 2.0, 1.1, 1.0
TDA2x: 2.0, 1.1, 1.0
DRA75x, DRA74x: 2.0, 1.1, 1.0
AM572x: 2.0, 1.1