SPRZ408D June   2014  – June 2021 AM4372 , AM4376 , AM4377 , AM4378 , AM4379

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Device and Development Support Tool Nomenclature
    2. 1.2 Revision Identification
  3. 2All Errata Listed With Silicon Revision Number
  4. 3Usage Notes and Known Design Exceptions to Functional Specifications
    1. 3.1 Usage Notes
      1. 3.1.1 LPDDR2/DDR3: JEDEC Compliance for Minimum Self-Refresh Command Interval
      2. 3.1.2 DDR3/DDR3L: JEDEC Specification Violation for DDR3 RESET Signal When Implementing RTC+DDR Mode
    2. 3.2 Known Design Exceptions to Functional Specifications
      1. 3.2.1 Advisory List
      2.      Advisory 1
      3.      Advisory 2
      4.      Advisory 3
      5.      Advisory 4
      6.      Advisory 5
      7.      Advisory 6
      8.      Advisory 7
      9.      Advisory 8
      10.      Advisory 9
      11.      Advisory 10
      12.      Advisory 11
      13.      Advisory 12
      14.      Advisory 13
      15.      Advisory 14
      16.      Advisory 15
      17.      Advisory 16
      18.      Advisory 17
      19.      Advisory 19
      20.      Advisory 20
      21.      Advisory 21
      22.      Advisory 22
      23.      Advisory 24
      24.      Advisory 25
      25.      Advisory 26
      26.      Advisory 27
      27.      Advisory 28
      28.      i2223
      29.      i2224
      30.      i912
      31.      i2225
      32.      i2226
  5. 4Revision History

i2226

PRU-ICSS: Burst data transfer between ICSS instances not supported

Revisions Affected

1.1, 1.2

Details

The expansion port between PRU-ICSS0 and PRU-ICSS1 does not support burst reads or burst writes. In this case, “burst” means SBBO and LBBO assembly instructions that are moving data longer than 4 bytes from one ICSS to the other ICSS. These two assembly instructions do not work properly if the local data memory address for the expansion port is used. The expansion port to allow a PRU to access the other PRU-ICSS starts at local address 0x0004_0000. See the PRU-ICSS Memory Map Overview in the Technical Reference Manual for more information on memory maps.

Workaround

1) Use the global memory map address with SBBO/LBBO instructions that interact with data in the other ICSS.

OR

2) Use the local memory map address for the expansion port to load or store data in the other ICSS, but only move a maximum of 4 bytes per SBBO/LBBO instruction. The 4 byte copies may be performed in a while loop, in an unrolled jump table, etc.