SPRZ412N December   2013  – May 2024 TMS320F28374D , TMS320F28375D , TMS320F28376D , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28378D , TMS320F28379D , TMS320F28379D-Q1

 

  1.   1
  2.   Abstract
  3. 1Usage Notes and Advisories Matrices
    1. 1.1 Usage Notes Matrix
    2. 1.2 Advisories Matrix
  4. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development Support Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  5. 3Silicon Revision C Usage Notes and Advisories
    1. 3.1 Silicon Revision C Usage Notes
      1. 3.1.1 PIE: Spurious Nested Interrupt After Back-to-Back PIEACK Write and Manual CPU Interrupt Mask Clear
      2. 3.1.2 Caution While Using Nested Interrupts
      3. 3.1.3 SYS/BIOS: Version Implemented in Device ROM is not Maintained
      4. 3.1.4 SDFM: Use Caution While Using SDFM Under Noisy Conditions
      5. 3.1.5 McBSP: XRDY Bit can Hold the Not-Ready Status (0) if New Data is Written to the DX1 Register Without Verifying if the XRDY Bit is in its Ready State (1)
    2. 3.2 Silicon Revision C Advisories
      1.      Advisory
      2.      Advisory
      3.      Advisory
      4.      Advisory
      5.      Advisory
      6.      Advisory
      7.      Advisory
      8.      Advisory
      9.      Advisory
      10.      Advisory
      11.      Advisory
      12.      Advisory
      13.      Advisory
      14.      Advisory
      15.      Advisory
      16.      Advisory
      17.      Advisory
      18.      Advisory
      19.      Advisory
      20.      Advisory
      21.      Advisory
      22.      Advisory
      23.      Advisory
      24.      Advisory
      25.      Advisory
      26.      Advisory
      27.      Advisory
      28.      Advisory
      29.      Advisory
      30.      Advisory
      31.      Advisory
      32.      Advisory
      33.      Advisory
      34.      Advisory
      35.      Advisory
      36.      Advisory
      37.      Advisory
      38.      Advisory
  6. 4Silicon Revision B Usage Notes and Advisories
    1. 4.1 Silicon Revision B Usage Notes
    2. 4.2 Silicon Revision B Advisories
      1.      Advisory
      2.      Advisory
      3.      Advisory
      4.      Advisory
      5.      Advisory
      6.      Advisory
      7.      Advisory
      8.      Advisory
      9.      Advisory
  7. 5Silicon Revision A Usage Notes and Advisories
    1. 5.1 Silicon Revision A Usage Notes
    2. 5.2 Silicon Revision A Advisories
      1.      Advisory
      2.      Advisory
      3.      Advisory
      4.      Advisory
      5.      Advisory
      6.      Advisory
      7.      Advisory
      8.      Advisory
      9.      Advisory
      10.      Advisory
      11.      Advisory
  8. 6Silicon Revision 0 Usage Notes and Advisories
    1. 6.1 Silicon Revision 0 Usage Notes
    2. 6.2 Silicon Revision 0 Advisories
      1.      Advisory
  9. 7Documentation Support
  10. 8Trademarks
  11. 9Revision History

Advisory

Analog Trim of Some TMX Devices

Revisions Affected

0, A, B

Details

Some TMX samples may not have analog trims programmed. This could degrade the performance of the ADC, buffered DAC, and internal oscillators. A value of all zeros in these trim registers due to lack of trim will have the following impact.

TRIMREGISTERIMPACT OF UNTRIMMED REGISTER
ADC referenceAnalogSubsysRegs.ANAREFTRIMADegraded performance of the ADC for all specifications.
AnalogSubsysRegs.ANAREFTRIMB
AnalogSubsysRegs.ANAREFTRIMC
AnalogSubsysRegs.ANAREFTRIMD
ADC linearityAdcaRegs.ADCINLTRIM1-6Degraded INL and DNL specifications of the ADC in 16-bit mode. No workaround available.
AdcbRegs.ADCINLTRIM1-6
AdccRegs.ADCINLTRIM1-6
AdcdRegs.ADCINLTRIM1-6
ADC offsetAdcaRegs.ADCOFFTRIMDegraded performance of the ADC offset error specification.
AdcbRegs.ADCOFFTRIM
AdccRegs.ADCOFFTRIM
AdcdRegs.ADCOFFTRIM
Internal oscillatorAnalogSubsysRegs.INTOSC1TRIMDegraded frequency accuracy and temperature drift of the internal oscillators.
AnalogSubsysRegs.INTOSC2TRIM
Buffered DAC offsetDacaRegs.DACTRIMDegraded offset error specification of the buffered DAC. No workaround available.
DacbRegs.DACTRIM
DaccRegs.DACTRIM

Workarounds

The following workarounds can be used for improved performance, though it still may not meet data sheet specifications.

To determine if a device is TMX in software, check the status of the PARTIDL[QUAL]. If this field is 0, the device is TMX. PARTIDL[QUAL] can be read via the function call SysCtl_getDeviceParametric(SYSCTL_DEVICE_QUAL). This check is implemented in the Device_init() function, which will then call the Device_configureTMXAnalogTrim() function if needed. The user can place any additional self-calibration or static calibration code in the Device_configureTMXAnalogTrim() function.

If the ADC reference trim registers contain all zeros, write the static reference trim value of 0x7BDD to the reference trim register for all ADCs.

Missing ADC offset trim can be generated by following the instructions in the “ADC Zero Offset Calibration” section of the TMS320F2837xD Dual-Core Real-Time Microcontrollers Technical Reference Manual .

If the internal oscillator trim contains all zeros, the user can adjust the lowest 10 bits of the oscillator trim register between 1 (minimum) and 1023 (maximum) while observing the system clock on the XCLOCKOUT pin.