SPRZ422K August 2014 – May 2024 TMS320F28374S , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376S , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378S , TMS320F28379S
ePIE: Spurious VCU Interrupt (ePIE 12.6) Can Occur When First Enabled
B
The VCU-II can power up in a state which incorrectly sets the VCU VSTATUS[DIVE] error bit and, subsequently PIEIFR12[INTx6], when the CPU is released from reset. When the VCU interrupt enable PIEIER12[INTx6] is enabled for the first time by the application, a spurious interrupt can occur due to the erroneous pending interrupt.
Before enabling VCU interrupt 12.6, execute the following instructions to avoid the spurious interrupt.
// Clear VCU divide by zero status
asm(" VCLRDIVE");
// Clear PIE interrupt for VCU
PieCtrlRegs.PIEIFR12.bit.INTx6 = 0;
Beginning with revision C silicon, the Boot ROM will perform the above workaround before branching to the application.