米6体育平台手机版

SPRZ422K August 2014 – May 2024 TMS320F28374S , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376S , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378S , TMS320F28379S

1
Abstract
1Usage Notes and Advisories Matrices
1. 1.1 Usage Notes Matrix
2. 1.2 Advisories Matrix
2Nomenclature, Package Symbolization, and Revision Identification
3Silicon Revision C Usage Notes and Advisories
1. 3.1 Silicon Revision C Usage Notes
2. 3.2 Silicon Revision C Advisories
  1. Advisory
  2. Advisory
  3. Advisory
  4. Advisory
  5. Advisory
  6. Advisory
  7. Advisory
  8. Advisory
  9. Advisory
  10. Advisory
  11. Advisory
  12. Advisory
  13. Advisory
  14. Advisory
  15. Advisory
  16. Advisory
  17. Advisory
  18. Advisory
  19. Advisory
  20. Advisory
  21. Advisory
  22. Advisory
  23. Advisory
  24. Advisory
  25. Advisory
  26. Advisory
  27. Advisory
  28. Advisory
  29. Advisory
  30. Advisory
  31. Advisory
  32. Advisory
  33. Advisory
  34. Advisory
  35. Advisory
  36. Advisory
  37. Advisory
4Silicon Revision B Usage Notes and Advisories
1. 4.1 Silicon Revision B Usage Notes
2. 4.2 Silicon Revision B Advisories
  1. Advisory
  2. Advisory
  3. Advisory
  4. Advisory
  5. Advisory
  6. Advisory
  7. Advisory
  8. Advisory
  9. Advisory
5Documentation Support
6Trademarks
7Revision History

Advisory

INTOSC: V_DDOSC Powered Without V_DD Can Cause INTOSC Frequency Drift

Revisions Affected

B, C

Details

The "G" revision of the TMS320F2837xS Real-Time Microcontrollers data sheet (SPRS881G) has updated power sequencing requirements. Revision "F" and earlier revisions of the data sheet did not require V_DDOSC and V_DD to be powered on and powered off at the same time.

If V_DDOSC is powered on while V_DD is not powered, there will be an accumulating and persistent downward frequency drift for INTOSC1 and INTOSC2. The rate of drift accumulated will be greater when V_DDOSC is powered without V_DD at high temperatures.

As a result of this drift, the INTOSC1 and INTOSC2 internal oscillator frequencies could fall below the minimum values specified in the data sheet. This would impact applications using INTOSC2 as the clock source for the PLL, with the system operating at a lower frequency than expected.

Workarounds

Keep V_DDOSC and V_DD powered together.
Use the external X1 and X2 crystal oscillators as the PLL clock source. The crystal oscillator does not have any drift related to V_DDOSC and V_DD supply sequencing.