米6体育平台手机版

SPRZ423K October 2014 – May 2024 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076

1
Abstract
1Usage Notes and Advisories Matrices
1. 1.1 Usage Notes Matrix
2. 1.2 Advisories Matrix
2Nomenclature, Package Symbolization, and Revision Identification
3Silicon Revision C Usage Notes and Advisories
1. 3.1 Silicon Revision C Usage Notes
2. 3.2 Silicon Revision C Advisories
  1. Advisory
  2. Advisory
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  31. Advisory
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  35. Advisory
  36. Advisory
4Silicon Revision B Usage Notes and Advisories
1. 4.1 Silicon Revision B Usage Notes
2. 4.2 Silicon Revision B Advisories
  1. Advisory
  2. Advisory
  3. Advisory
  4. Advisory
  5. Advisory
  6. Advisory
  7. Advisory
  8. Advisory
  9. Advisory
5Documentation Support
6Trademarks
7Revision History

Advisory

SDFM: Spurious Data Acknowledge Event When Data Filter is Synchronized Using PWM FILRES Signal

Revisions Affected

B, C

Details

When the SDFM data filters are synchronized using the PWM FILRES signal, it is possible to get a spurious data acknowledge event (AFx) before the data filter settles to give correct digital data. Subsequent data acknowledge events (AFx) occur correctly as per data filter configuration before the next PWM FILRES signal.

Workarounds

Do the following:

Choose any PWMx to work in the same time base as the PWM that generates the FILRES pulse.
PWMx should also interrupt the CPU/CLA at least 1.2 µs after the PWM FILRES pulse gets applied in order to clear the SDIFLG register that may be set because of the spurious data acknowledge event.
SDFM_CPUISR or SDFM_CLATask:
1. Collect the required number of samples, N, after the FILRES pulse.
2. If the number of samples is less than or equal to N, clear the SDIFLG register; otherwise, do not clear the SDIFLG register to prevent further SDFM interrupts.