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SPRZ423K October 2014 – May 2024 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076

1
Abstract
1Usage Notes and Advisories Matrices
1. 1.1 Usage Notes Matrix
2. 1.2 Advisories Matrix
2Nomenclature, Package Symbolization, and Revision Identification
3Silicon Revision C Usage Notes and Advisories
1. 3.1 Silicon Revision C Usage Notes
2. 3.2 Silicon Revision C Advisories
  1. Advisory
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4Silicon Revision B Usage Notes and Advisories
1. 4.1 Silicon Revision B Usage Notes
2. 4.2 Silicon Revision B Advisories
  1. Advisory
  2. Advisory
  3. Advisory
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  5. Advisory
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5Documentation Support
6Trademarks
7Revision History

Advisory

INTOSC: V_DDOSC Powered Without V_DD Can Cause INTOSC Frequency Drift

Revisions Affected

B, C

Details

The "G" revision of the TMS320F2807x Real-Time Microcontrollers data sheet (SPRS902G) has updated power sequencing requirements. Revision "F" and earlier revisions of the data sheet did not require V_DDOSC and V_DD to be powered on and powered off at the same time when using an external supply source for V_DD.

If V_DDOSC is powered on while V_DD is not powered, there will be an accumulating and persistent downward frequency drift for INTOSC1 and INTOSC2. The rate of drift accumulated will be greater when V_DDOSC is powered without V_DD at high temperatures.

As a result of this drift, the INTOSC1 and INTOSC2 internal oscillator frequencies could fall below the minimum values specified in the data sheet. This would impact applications using INTOSC2 as the clock source for the PLL, with the system operating at a lower frequency than expected.

Workarounds

Use the internal VREG, which will ensure V_DD is powered when V_DDOSC is present.
When using an external V_DD source, always keep V_DDOSC and V_DD powered together.
Use the external X1 and X2 crystal oscillators as the PLL clock source. The crystal oscillator does not have any drift related to V_DDOSC and V_DD supply sequencing.