SPRZ426F November   2014  – September 2024 DRA710 , DRA712 , DRA714 , DRA716 , DRA718 , DRA722 , DRA724 , DRA725 , DRA726

 

  1.   1
  2. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  3. 2Silicon Advisories
    1.     Revisions SR 2.1, 2.0, 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
    6.     i698
    7.     i699
    8.     i709
    9.     i727
    10.     i729
    11.     i734
    12.     i767
    13.     i782
    14.     i783
    15.     i802
    16.     i803
    17.     i807
    18.     i808
    19.     i809
    20.     i810
    21.     i813
    22.     i814
    23.     i815
    24.     i818
    25.     i819
    26.     i820
    27.     i824
    28.     i826
    29.     i829
    30.     i834
    31.     i849
    32.     i856
    33.     i862
    34.     i863
    35.     i867
    36.     i868
    37.     i869
    38.     i870
    39.     i871
    40.     i872
    41.     i874
    42.     i875
    43.     i878
    44.     i879
    45.     i880
    46.     i881
    47.     i882
    48.     i883
    49.     i887
    50.     i889
    51.     i890
    52.     i893
    53.     i895
    54.     i896
    55.     i897
    56.     i898
    57.     i899
    58.     i900
    59.     i903
    60.     i904
    61.     i906
    62.     i913
    63.     i916
    64.     i927
    65.     i928
    66.     i929
    67.     i930
    68.     i932
    69.     i933
    70.     i940
    71.     i2446
  4. 3Silicon Limitations
    1.     Revisions SR 2.1, 2.0, 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i844
    7.     i845
    8.     i848
    9.     i876
    10.     i877
    11.     i892
    12.     i909
    13.     i917
  5. 4Silicon Cautions
    1.     Revisions SR 2.1, 2.0, 1.0 - Cautions List
    2.     i781
    3. 4.1 95
    4.     i827
    5.     i832
    6.     i836
    7.     i839
    8.     i864
    9.     i885
    10.     i886
    11.     i912
    12.     i918
    13.     i920
    14.     i926
    15.     i931
    16.     i934
    17. 4.2 109
  6. 5Revision History

i934

VDDA_PCIE to VDDA33V_USB1 Current Path

CRITICALITY

High

DESCRIPTION

An unintended leakage current path between VDDA_PCIE (1.8 V) and VDDA33_USB1 (3.3 V) due to ESD protection diode connection across the signal to I/O supply pads exists. This path can allow current to flow from VDDA_PCIE to VDDA33V_USB1. The current flows whenever the voltage level on VDDA_PCIE exceeds VDDA33V_USB by more than a diode drop during certain power-up and power-down sequences.

This leakage current causes the un-energized VDDA33V_USB1 to rise to a ~1 V plateau (see Figure 4-3) due to the power resource’s “off impedance” seen between the VDDA33V_USB1 power rail to ground. When the minimum “off impedance” is >= 100 Ω, the SoC leakage current is small and sustainable with no SoC reliability impacts.

 Original Power-Up SequenceFigure 4-3 Original Power-Up Sequence

Note: Figure 4-3 shows in VDA_PHY_1V8 rail a plateau approximately 250 mV documented in i931, VDD to VDDA_"PHY" Current Path.

GUIDELINES

TI recommended Power Delivery Networks (PDNs) could have multiple different PMIC LDO power resources connected to the VDDA33V_USB1 rail. The LP8733/32 PMICs have a minimum OFF resistance equal to 150 Ω so a PDN using these PMICs would not exceed safe leakage current level and could continue to use the original SoC power sequences. However, the TPS65917/919 PMICs have a minimum OFF resistance equal to 30 Ω and would exceed the safe leakage current limit. As a result, any PDN using TPS65917/919 PMICs must implement the revised power sequencing as shown in DM version D or later. The specific sequence changes are:

  • For power-up, energize VDDA_PCIE either concurrently or after VDDA33V_USB1
  • For power-down, de-energize VDDA_PCIE either concurrently or before VDDA33V_USB1

The following PMIC OTP IDs have been aligned to the revised power sequencing to avoid any leakage current:

  • PDN using a single PIMC: TPS65917/919, OTP IDs = 0x4C/0x4D/0x4E/0x4F
  • PDN using dual PMICs: LP8733, OTP ID = 0x2D and LP8732, OTP ID = 0x20

REVISIONS IMPACTED

DRA71x SR 2.1, 2.0

DRA79x: 2.1, 2.0

TDA2Ex (17mm): 2.1, 2.0

AM570x: 2.1, 2.0

DRA71x: 2.1, 2.0