SPRZ426F November 2014 – September 2024 DRA710 , DRA712 , DRA714 , DRA716 , DRA718 , DRA722 , DRA724 , DRA725 , DRA726
32k Oscillator Fails to Start-Up at POR
Medium
The on-chip 32k oscillator fails to start up after release of power-on-reset input (porz).
SYSBOOT[9:8] = 00b mode is not usable with internal 32k oscillator as the device will not boot. This means internal only oscillator frequencies of 20MHz, 27MHz or 19.2MHz may be used. Startup of 32k depends on user software writing to RTCSS GZ bit and only RTCSS can use the 32k clock (after writing GZ bit to 0), all other FUNC_32K_CLK targets (e.g. timers, mmc and gpio de-bounce) can only use SYSCLK1. Full features of RTC mode are still functional after the 32k software enables the oscillator.
RTCSS is not supported on DRA71x family of devices.
Avoid SYSBOOT[9:8] = 00b setting. This means internal only oscillator frequencies of 20MHz, 27MHz or 19.2MHz may be used. This also means that the 32k_FUNC clock within the device (feeding MMC, GPIO, Timers) will always come from SYSCLK1/610 and not the true 32k clock, which will only feed the RTCSS.
DRA72x SR 2.0, 1.0
DRA71x SR 2.1, 2.0
TDA2Ex (23mm): 2.0, 1.0
TDA2Ex (17mm): 2.1, 2.0
AM571x: 2.1, 2.0, 1.0
AM570x: 2.1, 2.0
DRA72x: 2.0, 1.0
DRA71x: 2.1, 2.0