SPRZ436H October 2015 – July 2024 AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL
DPLL Controller Can Get Stuck While Transitioning to a Power Saving State
Low
The DPLL Controller can get stuck if it is in transition to a low power state while its M/N ratio is being programmed.
Before re-programming the M/N ratio, SW has to ensure the DPLL cannot start an idle state transition. SW can disable DPLL idling by setting the DPLL AUTO_DPLL_MODE=0 or keeping a clock request active by setting a dependent clock domain in SW_WKUP.
AM571x SR 2.1, 2.0, 1.0
AM570x SR 2.1, 2.0
DRA79x: 2.1, 2.0
TDA2Ex (23mm): 2.0, 1.0
TDA2Ex (17mm): 2.1, 2.0
AM571x: 2.1, 2.0, 1.0
AM570x: 2.1, 2.0
DRA72x: 2.0, 1.0
DRA71x: 2.1, 2.0