SPRZ436H October 2015 – July 2024 AM5706 , AM5708 , AM5716 , AM5718 , AM5718-HIREL
PCIe Preferred PCIe_PHY_RX SCP Register Settings Updated
Low
The “Preferred PCIe_PHY_RX SCP Register Settings” table in version C and later of the device-specific Technical Reference Manual (TRM) has been updated with values to select fully adaptive equalization and a second-order clock recovery algorithm. These changes have been shown to enhance PCIe receiver (RX) jitter tolerance for 5GT/s operation.
Software can be updated to the new preferred settings, especially for 5GT/s operation, if enhanced RX jitter tolerance is desired.
AM571x SR 2.1, 2.0, 1.0
AM570x SR 2.1, 2.0
DRA79x: 2.1, 2.0
TDA2Ex (23mm): 2.0, 1.0
TDA2Ex (17mm): 2.1, 2.0
AM571x: 2.1, 2.0, 1.0
AM570x: 2.1, 2.0
DRA72x: 2.0, 1.0
DRA71x: 2.1, 2.0