CRITICALITY

Medium

DESCRIPTION

Under high speed HS200 and SDR104 modes, the functional clock for MMC modules will reach up to 192 MHz. At this frequency, the maximum obtainable timeout through of MMC host controller using MMCHS_SYSCTL[19:16] DTO = 0xE is (1/192MHz)*2^27 = 700ms. Commands taking longer than 700ms may be affected by this small window frame.

WORKAROUND

If the command requires a timeout longer than 700ms, then the MMC host controller command timeout can be disabled (MMCHS_CON[6] MIT = 0x1) and a software implementation may be used in its place. Detailed steps as follows (in Linux®):

1. During MMC host controller probe function (omap_hsmmc.c:omap_hsmmc_probe() ), inform processor that the host controller is incapable of supporting all the necessary timeouts.
2. Modify the MMC core software layer functionality so the core times out on its own when the underlying MMC host controller is unable to support the required timeout.

REVISIONS IMPACTED

AM571x SR 2.1, 2.0, 1.0
AM570x SR 2.1, 2.0

DRA79x: 2.1, 2.0

TDA2Ex (23mm): 2.0, 1.0

TDA2Ex (17mm): 2.1, 2.0

AM571x: 2.1, 2.0, 1.0

AM570x: 2.1, 2.0

DRA72x: 2.0, 1.0

DRA71x: 2.1, 2.0