SPRZ439H January 2017 – February 2024 TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1
GPIO: Open-Drain Configuration May Drive a Short High Pulse
0, A, B
Each GPIO can be configured to an open-drain mode using the GPxODR register. However, an internal device timing issue may cause the GPIO to drive a logic-high for up to 0–10 ns during the transition into or out of the high-impedance state.
This undesired high-level may cause the GPIO to be in contention with another open-drain driver on the line if the other driver is simultaneously driving low. The contention is undesirable because it applies stress to both devices and results in a brief intermediate voltage level on the signal. This intermediate voltage level may be incorrectly interpreted as a high level if there is not sufficient logic-filtering present in the receiver logic to filter this brief pulse.
If contention is a concern, do not use the open-drain functionality of the GPIOs; instead, emulate open-drain mode in software. Open-drain emulation can be achieved by setting the GPIO data (GPxDAT) to a static 0 and toggling the GPIO direction bit (GPxDIR) to enable and disable the drive low. For an example implementation, see the code below.
void main(void)
{ ...
// GPIO configuration
EALLOW; // disable pullup
GpioCtrlRegs.GPxPUD.bit.GPIOx = 1; // disable open-drain mode
GpioCtrlRegs.GPxODR.bit.GPIOx = 0; // set GPIO to drive static 0 before
// enabling output
GpioDataRegs.GPxCLEAR.bit.GPIOx = 1;
EDIS;
...
// application code
...
// To drive 0, set GPIO direction as output
GpioCtrlRegs.GPxDIR.bit.GPIOx = 1;
// To tri-state the GPIO(logic 1),set GPIO as input
GpioCtrlRegs.GPxDIR.bit.GPIOx = 0;
}