SPRZ447E July   2017  – July 2024 AM5746 , AM5748 , AM5749

 

  1.   1
  2. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  3. 2Silicon Advisories
    1.     Revisions SR 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
    6.     i698
    7.     i699
    8.     i709
    9.     i727
    10.     i729
    11.     i734
    12.     i767
    13.     i782
    14.     i783
    15.     i802
    16.     i803
    17.     i807
    18.     i808
    19.     i809
    20.     i810
    21.     i813
    22.     i814
    23.     i815
    24.     i818
    25.     i819
    26.     i820
    27.     i824
    28.     i826
    29.     i829
    30.     i834
    31.     i849
    32.     i856
    33.     i862
    34.     i863
    35.     i869
    36.     i870
    37.     i871
    38.     i872
    39.     i874
    40.     i878
    41.     i879
    42.     i883
    43.     i889
    44.     i890
    45.     i893
    46.     i896
    47.     i897
    48.     i898
    49.     i899
    50.     i900
    51.     i903
    52.     i904
    53.     i916
    54.     i929
    55.     i930
    56.     i932
    57.     i933
    58.     i936
    59.     i940
    60.     i2446
  4. 3Silicon Limitations
    1.     Revisions SR 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i845
    7.     i848
    8.     i876
    9.     i877
    10.     i892
    11.     i909
    12.     i925
  5. 4Silicon Cautions
    1.     Revisions SR 1.0 - Cautions List
    2.     i827
    3.     i832
    4.     i836
    5.     i839
    6.     i864
    7.     i885
    8.     i886
    9.     i912
    10.     i926
    11.     i931
    12.     i935
    13.     i937
  6. 5Revision History

i937

HDMI Transmitter is Marginal to Source Eye Mask Requirements Above 177MHz

CRITICALITY

Low

DESCRIPTION

When running the HDMI interface at greater than 177MHz pixel clock rate (e.g., 1920x1440@60fps, 8-bit color), the source eye diagram CK - DATA is marginal to the HDMI specification source eye mask requirements. The source eye diagram CK - DATA is marginal at the datasheet target of 185.6MHz (e.g., 1920x1080 @ 60fps, 10-bit color).

GUIDELINES

When running the HDMI interface at greater than 177MHz pixel clock rate, the receiver input signal requirements should be evaluated to determine whether the HDMI signal meets the input signal requirements of the receiving device or the TMDS input characteristics defined in the HDMI bus specification. If the input signal requirements of the receiver are met across all conditions, then no further action is needed. If the receiver input signal requirements are not met, then a max HDMI pixel clock rate of 177MHz should be applied.

REVISIONS IMPACTED

AM574x SR 1.0
AM576x SR 1.0

AM574x: 1.0

DRA75xP, DRA74xP, DRA77xP, DRA76xP: 1.0

TDA2Px: 1.0

AM576x: 1.0