SPRZ454B February   2018  – September 2024 TDA2P-ABZ , TDA2P-ACD

 

  1.   1
  2. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  3. 2Silicon Advisories
    1.     Revisions SR 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
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    42.     i883
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    46.     i896
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    59.     i940
    60.     i2446
  4. 3Silicon Limitations
    1.     Revisions SR 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i844
    7.     i845
    8.     i848
    9.     i876
    10.     i877
    11.     i892
    12.     i909
  5. 4Silicon Cautions
    1.     Revisions SR 1.0 - Cautions List
    2.     i781
    3.     i827
    4.     i832
    5.     i836
    6.     i839
    7.     i864
    8.     i885
    9.     i886
    10.     i912
    11.     i926
    12.     i931
    13.     i935
    14.     i937
  6. 5Revision History

i885

Software Requirements for Data Manual IO Timing

CRITICALITY

High

DESCRIPTION

In order to guarantee the values presented in the Timing Requirements and Switching Characteristics tables of the device Data Manual, proper software configuration of the IOs is required.

GUIDELINES

The required software IO configurations include:

  • Pin Multiplexing (CTRL_CORE_PAD_*[3:0] MUXMODE) selection compliant with the IOSETS defined in the datasheet. (See IOSET tables DM Chapter Timing Requirements and Switching Characteristics.)
  • Slew Control (CTRL_CORE_PAD_*[19] SLEWCONTROL) settings left at their default values. (See DM Section 1.8V and 3.3V Signal Transition Rates.)
  • Virtual and Manual IO Timing Modes configured as required for the desired mode of operation.(See TRM Sections Virtual IO Timing Modes and Manual IO Timing Modes.)
  • IO Delay Recalibration performed after adjusting the AVS voltage for VDD_CORE_L voltage domain. (See TRM Section IO Delay Recalibration.)

REVISIONS IMPACTED

SR 1.0

AM574x: 1.0

DRA75xP, DRA74xP, DRA77xP, DRA76xP: 1.0

TDA2Px: 1.0

AM576x: 1.0