Details:

The DDR controller has a built-in self-test (BIST) feature that can be used to test the DDR interface to external DRAM. Upon completion of the BIST, the controller automatically clears DDRSS_CTL_194[9-8] BIST_RESULT to 0, instead of waiting for the user to first clear DDRSS_CTL_194[0] BIST_GO to 0. This could result in a false negative being reported, that is, BIST test actually passed but DDRSS_CTL_194[9-8] BIST_RESULT indicates it failed.

Workaround(s):

Software workaround to correctly report the status of BIST.

1. Read the following BIST status fields before triggering the test.

DDRSS_CTL_310[31-0] BIST_FAIL_ADDR_0

DDRSS_CTL_311[2-0] BIST_FAIL_ADDR_1

DDRSS_CTL_306[31-0] BIST_FAIL_DATA_0

DDRSS_CTL_307[31-0] BIST_FAIL_DATA_1

DDRSS_CTL_308[31-0] BIST_FAIL_DATA_2

DDRSS_CTL_309[31-0] BIST_FAIL_DATA_3

DDRSS_CTL_302[31-0] BIST_EXP_DATA_0

DDRSS_CTL_303[31-0] BIST_EXP_DATA_1

DDRSS_CTL_304[31-0] BIST_EXP_DATA_2

DDRSS_CTL_305[31-0] BIST_EXP_DATA_3

DDRSS_CTL_206[11-0] BIST_ERR_COUNT (only valid if

DDRSS_CTL_200[2-0] BIST_TEST_MODE = 1, 2, 3 or 4)

2. Program desired BIST control fields and trigger BIST by setting the DDRSS_CTL_194[0] BIST_GO = 1

3. Poll for the BIST completed interrupt, indicated by DDRSS_CTL_293[11] INT_STATUS_0 bit.

4. Re-read BIST status fields listed in step (1).

If the values are different from step (1) then BIST has failed.

If the values are the same as step (1) then BIST has passed.