SPRZ455D december 2020 – june 2023 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1
ADVANCE INFORMATION
PRU-ICSSG: FDB table corruption during switch operation
When the PRU-ICSSG is configured as a 1Gbps Ethernet switch, and the FDB is used, during an FDB lookup there is a one PRU clock cycle window during which the FDB can be corrupted if there is a broadside access by PRU0.
The FDB lookup can be initiated by either port or by host action. Each row within the FDB has 4 “buckets,” or 32 Bytes, resulting in up to 4 buckets being corrupted at the given SA Hash index (depending on the PRU0 byte enables during the concurrent broadside access).
Broadside accesses by PRUs other than PRU0 have no affect.
A workaround within firmware to avoid PRU0 broadside access during the FDB lookup is possible but complex and not planned.