SPRZ455D december 2020 – june 2023 DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4VM , TDA4VM-Q1
ADVANCE INFORMATION
FSS: MCU_FSS0_WRT_TYPE Register is Logging Incorrectly
When programming the flash using the block method with embedded ECC, the FSS errors on any transaction that is not a full 32-byte block quanta.
The write error reporting stack is incorrectly connected to the ECC error stack.
MCU_FSS0_WRT_TYPE[12] WRT_ERR_ADR = top of ECC error stack (DED bit)
MCU_FSS0_WRT_TYPE[13] WRT_ERR_BEN = top of ECC error stack (SEC bit)
MCU_FSS0_WRT_TYPE[11-0] WRT_ERR_ROUTEID = top of ECC error stack
({MCU_FSS0_ECC_BLOCK_ADR[7-0] ECC_ERROR_BLOCK_ADDR, MCU_FSS0_ECC_TYPE[5] ECC_ERR_ADR, MCU_FSS0_ECC_TYPE[4] ECC_ERR_MAC, MCU_FSS0_ECC_TYPE[3] ECC_ERR_DA1, MCU_FSS0_ECC_TYPE MCU_FSS0_ECC_TYPE [2] ECC_ERR_DA0})
If any of the ECC error events is already processed, WRT_ERR_ADR, WRT_ERR_BEN, and WRT_ERR_ROUTEID bit fields of MCU_FSS0_WRT_TYPE register are zero.
None.