Details:

Controller receives FTS OS followed by SKIP OS during exit from Rx.L0s. SKIP OS is used to perform lane to lane de-skew. If this SKIP OS comes at a certain byte alignment internally, the de-skew operation fails.

This error leads to correctable error reported by the Controller using PCIE*_ERROR_PULSE_INT interrupt. The link automatically goes to recovery and trains back to L0 without causing link down. As a result, exit from Rx.L0s will be delayed by approximately 200us.

Workaround(s):

The link is able to recover from this error automatically. However, exit from RX.L0s will be delayed by approximately 200us.