SPRZ457H January 2021 – December 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
GPMC: Sub-32-bit read issue with NAND and FPGA/FIFO
Sub-32-bit reads on the GPMC interface will miss portions of the data, which will result in incorrect read data. This includes 8-bit or 16-bit reads from a NAND device or from an FPGA or FIFO interface. Note that 3-byte accesses are not allowed on the GPMC interface.
Read accesses on the GPMC interface must be performed as 32-bit reads. Writes are not affected by this erratum.