SPRZ458F May 2019 – February 2024 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S
Reset: Elevated VDD Current During Reset
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There is an elevated current of approximately 70 mA for each C28x CPU while held in reset. When the XRSn pin is low, both C28x cores will be in reset, resulting in 140 mA of additional current. After XRSn is released, there will be approximately 70 mA of current from the C28x CPU2 until it is released by from reset by CPU1.
Do not hold XRSn low or keep CPU2 in reset for extended durations when current consumption is a concern.