SPRZ496D October 2021 – May 2024 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
SYSTEM: HIC Illegal Read Error Flag Does not Get Asserted in Pagesel=0 Mode
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When a Host Read access is initiated to the same address of a pending write location (an illegal access sequence), the Illegal Read error flag does not get asserted in Pagesel=0 Mode. The error flag gets set for the same sequence in Pagesel=1 mode. The impact is low since it is an illegal sequence and SW is not expected to initiate a read to a write-pending location in the regular application flow.
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