米6体育平台手机版

SPRZ545C July 2023 – March 2024 TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

1
TMS320F28P65x MCUs Silicon Errata Silicon Revisions A, 0
1Usage Notes and Advisories Matrices
1. 1.1 Usage Notes Matrix
2. 1.2 Advisories Matrix
2Nomenclature, Package Symbolization, and Revision Identification
3Silicon Revision A Usage Notes and Advisories
1. 3.1 Silicon Revision A Usage Notes
2. 3.2 Silicon Revision A Advisories
  1. Advisory
  2. Advisory
  3. 3.2.1 Advisory
  4. Advisory
  5. 3.2.2 Advisory
  6. 3.2.3 Advisory
  7. Advisory
  8. Advisory
  9. Advisory
  10. Advisory
  11. Advisory
  12. 3.2.4 Advisory
  13. Advisory
  14. Advisory
  15. Advisory
  16. Advisory
4Silicon Revision 0 Usage Notes and Advisories
1. 4.1 Silicon Revision 0 Usage Notes
2. 4.2 Silicon Revision 0 Advisories
  1. 4.2.1 Advisory
5Documentation Support
6Trademarks
7Revision History

3.1.3 GPIO: GPIO Data Register is Reset by CPU1 Reset Only

Revisions Affected: 0, A

GPIO data registers are reset by CPU1 reset even though a GPIO pin is assigned to CPU2. This causes the GPIO pin to continue to drive the active value even when CPU2 is reset (by a reset source that only resets CPU2).