The AES engine is directly connected to the context and data registers so that it can immediately start processing when all data is available. The AES engine also interfaces to the I/O-control FSM and μDMA request interface. AES comprises the following major functional blocks:

• Global control FSM and μDMA interface
• Register interface module
• The AES engine

The AES engine, which is the major top-level component, comprises the following functional blocks:

• Mode-control FSM: manages the data flow to and from the AES engine and starts each encryption and decryption operation
• Feedback modes: the logic that implements the various feedback modes supported by AES
• AES key scheduler: generates AES encryption and decryption (round) keys
• AES encryption core: the AES encryption algorithm
• AES decryption core: the AES decryption algorithm
• Substitution-boxes (S-boxes): contain AES S-Box GF(2⁸) implementations.

For a key length of 128 bits, 10 rounds or 32 clock cycles are required, because {number of clock cycles} = 2 + 3 × {number of rounds}. While one data block processes, the next block can be preloaded immediately. When a block is preloaded, the previous block must finish before additional data can be loaded. Therefore, once the pipeline is full, sequential data blocks can be passed every 32 clock cycles.

The Hash engine supports basic SHA-256, SHA-224, SHA-512, and SHA-384 operations. It only requires reading of input data from an external source, this data is transferred through the DMAC modules. The hash results can be transferred either using a DMA operation or by reading it through the slave interface. The module also supports keyed hash operations like HMAC, in which part of data can be provided by the AHB slave interface instead of using the DMA