SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
Command ID number: 0x0802
CMD_RADIO_SETUP is a radio operation command. In addition to the parameters listed in Table 26-9, the command structure contains the fields listed in Table 26-15.
| Byte Index | Field | Bit Index | Bit Field name | Type | Description |
|---|---|---|---|---|---|
| 14 | mode | W | This is the main mode to use. 0x00: Bluetooth low energy 0x01: IEEE 802.15.4 0x02: 2-Mbps GFSK 0x05: 5-Mbps coded 8-FSK 0xFF: Keep existing mode; update overrides only. | ||
| 15 | loDivider | W | Divider setting to use. Refer to Smart RF Studio for the recommended settings per device and band. Range is limited for some chip versions. | ||
| 16–17 | config | 0–2 | frontEndMode | 0x00: Differential mode 0x01: Single-ended mode RFP 0x02: Single-ended mode RFN Others: Reserved | |
| 3 | biasMode | W | 0: Internal bias 1: External bias | ||
| 4-9 | analogCfgMode | W | 0x00: Write analog configuration. Required first time after boot and when changing frequency band or front-end configuration. 0x2D: Keep analog configuration. May be used after standby or when changing mode with the same frequency band and front-end configuration. Others: Reserved | ||
| 10 | bNoFsPowerup | W | 0: Power up frequency synthesizer. 1: Do not power up frequency synthesizer. | ||
| 11 | lnaIbBoost | Use setting from SmartRF Studio | |||
| 12 | bSynthNarrowBand | Use setting from SmartRF Studio | |||
| 13–15 | Reserved | ||||
| 18–19 | txPower | W | Output power setting; use
value from SmartRF Studio. For more details, see Section 26.3.3.2.16. 0xFFFF: Use 20 dBm PA | ||
| 20–23 | pRegOverride | W | Pointer to a list of hardware and configuration registers to override. If NULL, no override is used. |
On start, the radio CPU sets up parameters for the operational mode given by mode.radioMode, with the modifications given in pRegOverride, a pointer to a structure containing override values for certain hardware registers, radio configuration controlled by the radio CPU, and protocol-related variables. If pRegOverride is NULL, no registers are overridden. The override value structure is a string of 32-bit entries provided by TI or produced by SmartRF Studio.
Running CMD_RADIO_SETUP or another radio setup command is mandatory before using any command that uses the receiver, transmitter, or frequency synthesizer. If the RF core is reset, CMD_RADIO_SETUP must be re-run.
When CMD_RADIO_SETUP is executing, trim values are read from FCFG1 unless they have been provided elsewhere. If these values are read from FCFG1, the following limitations apply while CMD_RADIO_SETUP is executing:
The VIMS module must be powered, allowing flash reads.
If the previously defined limitation is violated, the internal system bus might end up in a nonresponsive state. A system reset is required to exit this state. To ensure that FCFG1 can be read while running CMD_RADIO_SETUP, the TI provided RF driver automatically enables VIMS while running a radio setup command.
Table 26-16 lists the format of a hardware register override entry. Table 26-17 lists the format of array initiator. Table 26-18 lists the format of an ADI register override entry. Table 26-19 lists the format of a firmware-defined parameter override entry. Table 26-20 lists the format of an MCE/RFE override mode entry. Table 26-21 lists the format of a center frequency entry.
The txPower parameter is stored and applied every time transmission of a packet starts to set an output power with temperature compensation. This setting can be changed later with the command CMD_SET_TX_POWER (see Section 26.3.3.2.16). If txPower is 0xFFFF, the 20 dBm PA is selected instead of the normal one. This setting is only allowed on a "P" device. If this setting is used, a 20 dBm PA power override as defined in Table 26-22 is mandatory; if missing the setup command will end with error.
| Bit Index | Bit Field Name | Description |
|---|---|---|
| 0–1 | entryType | 00: Hardware register 01: Array initiator, see Table 26-17 10: ADI register, see Table 26-18, or MCE/RFE override 11: Firmware defined parameter, see Table 26-19 |
| 2–15 | hwAddr | Bits 2–15 of the address to the hardware register. Bits 0–1 of the address are 0. |
| 16–31 | value | The value to write to the register |
| Bit Index | Bit Field Name | Description |
|---|---|---|
| 0–1 | entryType | 01: Array initiator |
| 2–15 | startAddr | First address or index to write to: Hardware registers: Bits 2–15 of the address (bits 0–1 are 0) ADI registers: ADI bus address, half-byte indicator in bit 6, ADI selector in bit 7 Firmware-defined parameters: Byte Index |
| 16–29 | length | Number of entries |
| 30–31 | arrayType | Type of array: 00: Hardware registers with 16-bit values 01: Hardware registers with 32-bit values 10: ADI registers 11: Firmware-defined parameters |
| Bit Index | Bit Field Name | Description |
|---|---|---|
| 0–1 | entryType | 10: ADI register |
| 2–9 | adiValue2 | Optional second value to write |
| 10–15 | adiAddr2 | Optional second ADI bus address |
| 16–23 | adiValue | Value to write to register |
| 24–29 | adiAddr | ADI bus address |
| 30 | bHalfSize | 0: Use full-size writes 1: Use half-size writes, causing read-modify-write functionality |
| 31 | adiNo | 0: Write to ADI 0 (RF) 1: Write to ADI 1 (synthesizer) |
| Bit Index | Bit Field Name | Description |
|---|---|---|
| 0–1 | entryType | 11: Firmware-defined parameter |
| 2–3 | entrySubType | 00: Firmware-defined parameter 01: MCE/RFE override mode (must be in first entry), see Table 26-20 10: Reserved 11: End of override list |
| 4–14 | fwAddr | Byte index into parameter structure |
| 15 | bByte | 0: 16-bit value 1: 8-bit value |
| 16–31 | value | The value to write to the parameter |
| Bit Index | Bit Field Name | Description |
|---|---|---|
| 0–1 | entryType | 11: Firmware-defined parameter |
| 2–3 | entrySubType | 01: MCE/RFE override mode |
| 4 | bMceCopyRam | If 1, copy the contents of the MDM ROM bank given by mceRomBank to RAM after MCE has completed setup. |
| 5 | bRfeCopyRam | If 1, copy the contents of the RFE ROM bank given by rfeRomBank to RAM after MCE has completed setup. |
| 6 | bMceUseRam | 0: Run MCE from ROM 1: Run MCE from RAM |
| 7–10 | mceRomBank | MCE ROM bank to run from |
| 11 | bRfeUseRam | 0: Run RFE from ROM 1: Run RFE from RAM |
| 12–15 | rfeRomBank | RFE ROM bank to run from |
| 16–23 | mceMode | Mode to send to MCE |
| 24–31 | rfeMode | Mode to send to RFE |
| Bit Index | Bit Field Name | Description |
|---|---|---|
| 0–1 | entryType | 11: Firmware-defined parameter |
| 2–3 | entrySubType | 10: Special configuration |
| 4–7 | specialType | 0001: Center frequency entry |
| 8 | Reserved | |
| 9 | bAutoTxIf | If 1, set TX IF to RX IF. |
| 10 | bApplyRx | If 1, use invRfFreq to recalculate RX IF. |
| 11 | bApplyTx | If 1, use invRfFreq to recalculate TX shape. |
| 12–31 | invRfFreq | Value where fRFMHz is center frequency in MHz: (12 × 24 × 220) / (fRFMHz × loDivider) |
| Bit Index | Bit Field Name | Description |
|---|---|---|
| 0–1 | entryType | 11: Firmware defined parameter |
| 2–3 | entrySubType | 10: Special configuration |
| 4–7 | specialType | 0010: 20 dBm PA TX power entry |
| 8–9 | Reserved | |
| 10–15 | IB | New TX power setting. TI recommends using values from the SmartRF Studio. Value to write to the PA power control field at 25°C. See Equation 14 for details. |
| 16–17 | ibBoost | Value to write to the bias control field of the PA |
| 18 | boost | Driver strength into the PA 0: Low driver strength 1: High driver strength |
| 19–25 | tempCoeff | Temperature coefficient for IB 0: No temperature compensation |
| 26–31 | paLdoTrim | Value to write to the output voltage control of the 20 dBm PA LDO |
| Bit Index | Bit Field Name | Description |
|---|---|---|
| 0–1 | entryType | 11: Firmware-defined parameter |
| 2–3 | entrySubType | 11: End of list segment |
| 4–7 | nextEntryRegion | 0x0: End of list 0x1: SRAM. Base = 0x2000 0000 0x2: RF core RAM. Base = 0x2100 0000 0x3: Flash. Base = 0xA000 0000 0xF: End of list Others: Reserved |
| 8–31 | addrOffset | Address offset for next list part. Next address is: Base + (addrOffset × 4) |
Use the Code Export feature in SmartRF Studio to generate an override list for the different PHYs and settings.
If the pointer in pRegOverride is invalid, any override entry is invalid. If the length of an array is too large or zero, the operation ends with the status ERROR_PAR. If config.bNoFsPowerup = 0 and powering up the synthesizer fails, the command ends with ERROR_SYNTH_PROG as the status.
If CMD_ABORT or CMD_STOP is received while waiting for the start trigger, the operation ends without any setup. If CMD_STOP is received after the start trigger, setup proceeds until finished. If CMD_ABORT is received after the start trigger, the setup process is aborted. This leaves the registers in an incomplete state, so another CMD_RADIO_SETUP command must be issued before using the radio.