SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
The CC13x2x7 and CC26x2x7 device platform provides 144 kB of low-leakage, on-chip SRAM with optional retention in all power modes. Retention can be configured per 16 kB block. Additionally, the 8 kB flash cache RAM can be reconfigured to operate as normal system RAM. Because read-modify-write (RMW) operations are very time consuming, Arm® has introduced bit-banding technology in the Arm® Cortex®-M4F processor. With a bit-band-enabled processor, certain regions in the memory map (SRAM and peripheral space) can use address aliases to access individual bits in a single, atomic operation.
Data can be transferred to and from the SRAM using the micro DMA (µDMA) controller.