SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
3.7.2.1 FPU Views of the Register Bank
The FPU provides an extension register file containing 32 single-precision registers (see Figure 3-4). These can be viewed as:
- Sixteen 64-bit doubleword registers, D0–D15.
- Thirty-two 32-bit single-word registers, S0–S31.
- A combination of registers from these views:
Figure 3-4 FPU Register BankThe mapping between the registers is as follows:
- S<2n> maps to the least significant half of D<n>.
- S<2n+1> maps to the most significant half of D<n>.
For example, you can access the least significant half of the value in D6 by accessing S12, and the most significant half of the elements by accessing S13.