SWRA111E November 2006 – September 2018 CC1100 , CC1100E , CC1101 , CC1101-Q1 , CC1110-CC1111 , CC1131-Q1 , CC1150 , CC1151-Q1 , CC2500 , CC2510 , CC2510F8 , CC2511 , CC2511F8 , CC2550 , CC430F5123 , CC430F5125 , CC430F5133 , CC430F5135 , CC430F5137 , CC430F5143 , CC430F5145 , CC430F5147 , CC430F6125 , CC430F6126 , CC430F6127 , CC430F6135 , CC430F6137 , CC430F6147
2 CRC Implementation
CC2500, CC2510, CC2511, and CC2550 all support two CRC implementations:
- Normal mode CRC
- CC2400 CRC (only for backwards compability)
Bit 3 (CC2400_EN) in the PKTCTRL0 register is used to select which mode to use.
CC430, CC1100, CC1100E, CC1101, CC1110, CC1111, and CC1150 only support the normal mode CRC, and hence bit 3 in the PKTCTRL0 register is not used on these devices.
In the normal mode (PKTCTRL0.CC2400_EN = 0), the CRC polynomial is CRC16 (x16 + x15 + x2 + 1) with the CRC register reset to all ones. Figure 1 shows the shift register implementation. Note that the data input is at x16.
Figure 1. Normal Mode CRC For backward compatibility, the CC2400 CRC implementation is also supported (PKTCTRL0.CC2400_EN = 1). Figure 2 shows the shift register implementation. The data input is at x0. When PKTCTRL0.CC2400_EN = 1, PKTCTRL0.WHITE_DATA and PKTCTRL1.CRC_AUTOFLUSH must be 0.
Figure 2. CC2400 CRC CRC is calculated over all bytes transmitted after the sync word. The CRC16 checksum is automatically transmitted after the last data byte. MSB is transmitted first.
See the device-specific data sheets for detailed use of the CRC functionality.