3.3 Standby Mode

In standby mode, the Cortex-M3 waits in deep-sleep for interrupts to wake up after executing the WFI instruction. Before entering standby, power down system resources, including the high-frequency oscillator, radio, peripherals, and auxiliary domain. Many system modules have retention in standby including the Cortex-M3 (see the CC13x0, CC26x0 Technical Reference Manual for details). After waking up from standby, the Cortex-M3 resumes executing programs at the point before entering standby.

Because CC26x0 and CC13x0 devices run on a low-power LDO in standby, most system resources are unavailable in standby. Use the RTC, which runs in standby, to wake up the Cortex-M3. The Cortex-M3 can wake up on any interrupt-enabled, external input pin.

The application must consider the latency associated with entering and exiting when using standby mode.

If the next wakeup is in less than 1 ms, the TI-RTOS implementation does not enter standby. If the application requires exact timing, consider the latency associated with entering and waking up from standby. The TI-RTOS implementation handles this latency by inserting wake-up event four RTC edges (64 µs) earlier than the event to ensure the system powers on in time to service the wake-up event scheduled by the application.

The TI-RTOS standby implementation allows a variation where the cache contents are retained. In standby, the system draws approximately 2 µA more than it does without retaining the cache. System start-up from standby is typically quicker. The main system RAM should always be retained in standby mode. The main system RAM retention is also the default configuration when the device boots up.

The following code for entering and exiting standby is from the TI-RTOS PowerCC26XX.c implementation: C:\ti\tirtos_cc13xx_cc26xx_#_##_##_##\products\tidrivers_cc13xx_cc26xx_#_##_##_##\packages\ti\drivers\power\PowerCC26XX.c.