3.2 LPDS State

To enter into this mode each subsystem processor requests the clock management unit for shutting off their subsystem. When both the subsystems request for this mode, Clock management unit will turn off the PLL, 40 Mhz xtal, and the power management unit will shut off the power to each subsystem and scale down the voltage of always on domain to 0.9 V. Active logic in this mode will work at 32 KHz xtal. There is an option of retaining the memory content for each subsystem or not. Wakeup sources to exit this sleep mode can be a toggle event on the device’s general purpose IO (GPIO) or based on timer expiry. In this mode, power saving happens because of turning off of power domain, turning off of PLL, turning off of 40 MHz xtal, memory not retained if opted, and voltage scale down. In order to measure the static Low Power Deep sleep (LPDS) current consumption, the user needs to set the global use case variable to SLEEP_MEASURE.

The application enables the user to enter a constant Sleep mode (no traffic) to enable an easy way to measure the power consumption of this state.

Figure 2. CC3200 to Static LPDS Current Measure

To do so, configure g_ActiveUseCase to "SLEEP_MEASURE" in the PM management benchmark code.