SWRA751 September 2022
Description:
This command configures enhanced configuration of the codec interface. This command is optional and cannot be used when all default parameters are acceptable. When this command is used, it must come after HCI_VS_Write_CODEC_Config.
Command Parameter | Size | Value | Description |
---|---|---|---|
Clock shutdown | 1 |
0x00 0x01 |
PCM clock shutdown feature is disabled. PCM clock shutdown feature is enabled. Time of start/stop is defined in the following two fields (used in master mode only). |
Clock start | 2 | 0x0000 – 0xFFFF | Number of PCM clock cycles relative to the PCM frame sync to start PCM clock (for example, start two clocks before frame sync) |
Clock stop | 2 | 0x0000 – 0xFFFF | Number of PCM clock cycles relative to the PCM frame sync to stop PCM clock (for example, stop 20 clocks after frame sync) |
Reserved | 1 | 0x00 | Default: 0x00 |
Channel 1 data in order | 1 |
Bit 0 = 0 Bit 0 = 1 Bit 1 = 0 Bit 1 = 1 Bit 2 = 0 Bit 2 = 1 |
Data driven MSB first Data driven LSB first Don’t swap bytes within the sample. Swap bytes within the sample in bit-wise mode when data size > 8 ([XYZ]->[ZYX]). Do not shift the sample. Shift the sample by (24|16-dout_size) bits from MSB to LSB (controls sample alignment inside internal register (23:0) in bit-wise mode only). |
Channel 1 data out order | 1 |
Bit 0 = 0 Bit 0 = 1 Bit 1 = 0 Bit 1 = 1 Bit 2 = 0 Bit 2 = 1 |
Data driven MSB first Data driven LSB first Don’t swap bytes within the sample. Swap bytes within the sample in bit-wise mode when data size > 8 ([XYZ]->[ZYX]). Do not shift the sample. Shift the sample by (24|16-dout_size) bits from MSB to LSB (controls sample alignment inside internal register (23:0) in bit-wise mode only). |
Channel 1 data out mode | 1 |
0x00 0x01 0x02 0x03 |
Always 3-state (input) Always output Switch to 3-state (input) when idle Always 3-state (input) |
Channel 1 data out duplication | 1 |
0x00 0x01 |
Retransmit last sample when no data are available. 0x01 Transmit DUP_VALUE when no data are available. |
Channel 1 TX_dup_value | 4 | 0x00000000 – 0x00FFFFFF | Replacement value to transmit when no data is available |
Channel 1 data quant | 1 |
0x00 0x01 |
Bit-wise mode. Possible if data in and data out size are up to 24 bits. Byte-wise mode |
Reserved | 1 | ||
Channel 2 data in order | 1 |
Bit 0 = 0 Bit 0 = 1 Bit 1 = 0 Bit 1 = 1 Bit 2 = 0 Bit 2 = 1 |
Data driven MSB first Data driven LSB first Don’t swap bytes within the sample. Swap bytes within the sample in bit-wise mode when data size > 8 ([XYZ]->[ZYX]). Do not shift the sample. Shift the sample by (24|16-dout_size) bits from MSB to LSB (controls sample alignment inside internal register (23:0) in bit-wise mode only). |
Channel 2 data out order | 1 |
Bit 0 = 0 Bit 0 = 1 Bit 1 = 0 Bit 1 = 1 Bit 2 = 0 Bit 2 = 1 |
Data driven MSB first Data driven LSB first Don’t swap bytes within the sample. Swap bytes within the sample in bit-wise mode when data size > 8 ([XYZ]->[ZYX]). Do not shift the sample. Shift the sample by (24|16-dout_size) bits from MSB to LSB (controls sample alignment inside internal register (23:0) in bit-wise mode only). |
Channel 2 data out mode | 1 |
0x00 0x01 0x02 0x03 |
Always 3-state (input) Always output Switch to 3-state (input) when idle Always 3-state (input) |
Channel 2 data out duplication | 1 |
0x00 0x01 |
Retransmit last sample when no data are available. 0x01 Transmit DUP_VALUE when no data are available. |
Channel 2 TX_dup_value | 4 | 0x00000000 – 0x00FFFFFF | Replacement value to transmit when no data is available |
Channel 2 data quant | 1 |
0x00 0x01 |
Bit-wise mode. Possible if data in and data out size are up to 24 bits. Byte-wise mode |
Reserved | 1 |
Returned Value | Description | Size (bytes) | Events Generated |
---|---|---|---|
0x00 0x01 – 0xFF |
Command succeeded. Command failed. |
1 | Command Complete |