米6体育平台手机版

SWRU455M February 2017 – October 2020 CC3120 , CC3120MOD , CC3130 , CC3135 , CC3135MOD , CC3220MOD , CC3220MODA , CC3220R , CC3220S , CC3220SF , CC3230S , CC3230SF , CC3235MODAS , CC3235MODASF , CC3235MODS , CC3235MODSF , CC3235S , CC3235SF

1 Overview
1. 1.1 Trademarks
1 Introduction
1. 1.1 Features
2. 1.2 Key Features
3. 1.3 Block Diagram
4. 1.4 Host Driver Overview
5. 1.5 Acronyms and Terminologies
2 Networking Application
1. 2.1 Introduction
2. 2.2 Basic Examples
3 Device
1. 3.1 Introduction
2. 3.2 Key Features
3. 3.3 Start and Stop
4. 3.4 Host Interface
  1. 3.4.1 SPI Interface
  2. 3.4.2 UART Interface
    1. 3.4.2.1 Change UART Baud Rate
5. 3.5 Version
6. 3.6 Event Mask
7. 3.7 Time and Date
8. 3.8 MAC Address
9. 3.9 Device Name
10. 3.10 Domain Name
11. 3.11 Device Status
12. 3.12 Persistent Configuration
13. 3.13 Device Statistics
14. 3.14 Errors
4 WLAN
1. 4.1 Introduction
2. 4.2 Key Features
3. 4.3 Station (STA)
4. 4.4 Access Point
5. 4.5 Wi-Fi Direct
6. 4.6 WLAN Security
7. 4.7 Scan
8. 4.8 Antenna Diversity
9. 4.9 Calibrations
  1. 4.9.1 2.4-GHz Wi-Fi Calibration Modes
  2. 4.9.2 5-GHz Wi-Fi Calibration Modes
10. 4.10 BLE / 2.4-GHz Radio Coexistence
5 Network Addresses
1. 5.1 Introduction
2. 5.2 Key Features
3. 5.3 Addressing
4. 5.4 DHCPv4 Client
  1. 5.4.1 Modes
  2. 5.4.2 Address Release
5. 5.5 DHCPv4 Server
  1. 5.5.1 Enable and Disable the DHCP Server
  2. 5.5.2 Set DHCP Server Parameters
6. 5.6 DNS Server
7. 5.7 Errors and Asynchronous Events
6 Socket
1. 6.1 Introduction
2. 6.2 Key Features
3. 6.3 Socket Types
4. 6.4 BSD API
5. 6.5 Socket Working Flow
6. 6.6 DNS
7. 6.7 Operation Modes
8. 6.8 IP Fragmentation
9. 6.9 Errors
7 Secure Socket
1. 7.1 Introduction
2. 7.2 Key Features
3. 7.3 Opening a Secure Socket
4. 7.4 Trusted Root-Certificate Catalog
5. 7.5 Options and Features Use
6. 7.6 Supported Cryptographic Algorithms
7. 7.7 Common Errors and Asynchronous Events
  1. 7.7.1 Using Socket Asynchronous Events in TLS
  2. 7.7.2 Common Errors
8 File System
1. 8.1 Introduction
2. 8.2 Key Features
3. 8.3 File System Characteristics
4. 8.4 Write a File
5. 8.5 Read a File
6. 8.6 Delete a File
7. 8.7 Rename a File
8. 8.8 File System Helper Functions
9. 8.9 Bundle Protection
10. 8.10 File Commit Feature
  1. 8.10.1 File Commit Process
11. 8.11 File Rollback Process
12. 8.12 Programming
  1. 8.12.1 Creation of the Programming Image
    1. 8.12.1.1 Programming Image Types
    2. 8.12.1.2 Program the Device
13. 8.13 Restore to Factory
  1. 8.13.1 Restore to Factory by the Host
  2. 8.13.2 Restore to Factory by Using the SOP
    1. 8.13.2.1 CC31xx
    2. 8.13.2.2 CC32xx
14. 8.14 Security Alerts
15. 8.15 Design Consideration
9 HTTP Server
1. 9.1 Introduction
2. 9.2 Key Features
3. 9.3 Configurations and Settings
4. 9.4 RESTful API Processing
5. 9.5 Device Parameter Querying Through HTTP (Device Tokens)
6. 9.6 Resource Search Order
7. 9.7 Host HTTP Requests Processing
8. 9.8 Security
  1. 9.8.1 Authentication
    1. 9.8.1.1 HTTP Realm
  2. 9.8.2 Secure Connection
9. 9.9 Processing of Parallel Requests
10mDNS
1. 10.1 Introduction
2. 10.2 Key Features
3. 10.3 Configurations and Settings
4. 10.4 Query
5. 10.5 Get Service List
6. 10.6 Advertisement
7. 10.7 Limitations
11Rx Filters
1. 11.1 Introduction
2. 11.2 Matching Process
  1. 11.2.1 Filter Matching
  2. 11.2.2 Tree Traversal
3. 11.3 Examples of Filter Use
  1. 11.3.1 Example 1
  2. 11.3.2 Example 2
4. 11.4 Filter Creation
5. 11.5 Managing Filters
12Ping
1. 12.1 General Description
2. 12.2 Start and Stop Ping
3. 12.3 Limitations
13Transceiver
1. 13.1 Introduction
2. 13.2 Key Features
3. 13.3 Configurations and Setting
4. 13.4 Internal Packet Generator
5. 13.5 CW
6. 13.6 Changing Socket Properties
7. 13.7 Limitations
14Real-Time RSSI
1. 14.1 Introduction
2. 14.2 Data Structure
3. 14.3 Configurations and Settings
4. 14.4 Constraints
15Power Management
1. 15.1 Introduction
2. 15.2 Configurations and Settings
  1. 15.2.1 Changing Power Policy
  2. 15.2.2 Enabling Fast Connect
3. 15.3 Network Applications and Power Consumption
  1. 15.3.1 mDNS
  2. 15.3.2 HTTP Server
4. 15.4 Design Guidelines
  1. 15.4.1 LSI and Packet Loss
  2. 15.4.2 PHY Calibration Mode
16Provisioning
1. 16.1 Introduction
2. 16.2 Key Features
3. 16.3 Provisioning Process Overview
  1. 16.3.1 Configuring a Profile
  2. 16.3.2 Confirming a Profile
4. 16.4 Host Provisioning Application Flow
5. 16.5 Configuration Modes
6. 16.6 Starting and Stopping the Provisioning Process
7. 16.7 Auto-Provisioning
8. 16.8 Delivering Feedback to the User
  1. 16.8.1 External Confirmation
9. 16.9 External Configuration
10. 16.10 Common Events and Errors
11. 16.11 Usage Examples
17Crypto Utilities
1. 17.1 Introduction
2. 17.2 Secured Content Delivery
  1. 17.2.1 SimpleLink Wi-Fi Side Process Flow
  2. 17.2.2 Encrypted File Format
18Hostless Mode
1. 18.1 Introduction
2. 18.2 Script Overview
3. 18.3 Conditions
4. 18.4 Sub-Conditions
5. 18.5 Actions
  1. 18.5.1 Pre-Initialization Actions
  2. 18.5.2 Run-Time Actions
19Porting the Host Driver
1. 19.1 Introduction
2. 19.2 Create Platform Porting File
3. 19.3 Select Capabilities Set
4. 19.4 Bind the Device Enable/Disable Line
5. 19.5 Implement the Interface Communication Abstract Layer
6. 19.6 Choose Memory-Management Model
7. 19.7 Implement OS Adaptation Layer
  1. 19.7.1 Sync Objects
  2. 19.7.2 Locking Objects
8. 19.8 Implement Timestamp Services
9. 19.9 Set Asynchronous Event Handler Routines
20Debug
1. 20.1 Capture NWP Logs
  1. 20.1.1 Overview
  2. 20.1.2 Instructions
    1. 20.1.2.1 Configuring Pin Mux for CC32xx
    2. 20.1.2.2 Terminal Settings
    3. 20.1.2.3 Run Your Program
    4. 20.1.2.4 Send to TI Engineer
      1.        A Host APIs
        
                A.1 Host APIs
        
                 B Persistency
        
                  B.1 Persistency
        
                   C Regulatory Domain
        
                    C.1 Regulatory Domain
        
                     D Supported Host Interfaces
        
                      D.1 SPI Host Interface
        
                       D.1.1 Introduction
        
                       D.1.2 Abbreviations
        
                       D.1.3 SPI Modes
        
                       D.1.4 SPI Configurations (Shared SPI)
        
                       D.1.5 SPI Initialization
        
                       D.1.6 Host Interface Protocol - SPI Perspective
        
                      D.2 UART Host Interface
        
                       D.2.1 Introduction
        
                       D.2.2 Host Low Power Modes
        
                       D.2.3 UART Host Topologies
        
                        D.2.3.1 5-Wire UART Topology
        
                        D.2.3.2 4-Wire UART Topology
        
                        D.2.3.3 3-Wire UART Topology
        
                       D.2.4 UART Configuration
        
                       D.2.5 UART Initialization
        
                        D.2.5.1 Changing the UART Baud Rate
        
                       D.2.6 Implementing the UART Driver - Concept and Terminology
        
                        D.2.6.1 UART Read API Implementation
        
                        D.2.6.2 UART Write API Implementation
        
                       D.2.7 Register/Unregister Interrupt Handler API Implementation
        
                       D.2.8 Host Interface Protocol – UART Perspective
        
                        D.2.8.1 UART Host Command Flow
        
                        D.2.8.2 Synchronization Words
        
                         Revision History

D.2.6 Implementing the UART Driver - Concept and Terminology

The user implementing the low level UART driver must consider the following components in mind:

Jitter buffer - An internal buffer (minimum of 4 bytes size) responsible to store the bytes sent by the SimpleLink device until the host read operation starts. The host driver is informed on new data reception upon character detection on the RX UART line, and is expected to start its read operation immediately afterwards.
SW Flow Control Manager – The SimpleLink device requires the UART to use hardware flow control. In some low-cost controllers, there is no support for hardware flow control in their UART peripheral. In these cases, the user must implement software flow control that protects the jitter buffer from being overridden, by asserting the RTS line before it gets full, and follows the CC31XX device flow control state by testing the CTS line before sending any data.
Active Buffer – points to the current buffer to accept the incoming bytes. At the beginning of received message points to the jitter buffer, and upon UART read operation start is switched to the host driver supplied one.