Revisions Affected:

Revision E and earlier

Details:

There is no dedicated clock source selection for the ADC clock. The clock is derived from either XOSC_HF or RCOSC_HF, but defaults to XOSC_HF-derived clock whenever this is turned on.

When the ADC clock source is switched from RCOSC_HF to XOSC_HF-derived clock, the clock will stop for 2 cycles (24 MHz).

When the ADC clock source is switched from XOSC_HF-derived clock to RCOSC_HF-derived clock, the clock will stop for additionally 12 clock cycles, as the RCOSC_HF-derived clock is not ready when switch is done.

The additional 12 clock cycles introduces a race between trigger-event and ADC trigger-detector to get out of reset.

Workaround 1:

Updated TI software adds a short delay at the end of the function that enables the ADC.

• If using the ADC through the System CPU (TI drivers or DriverLib API): Use SimpleLink CC13x2 and CC26x2 SDK 4.30 or later (release end of Q3 2020)
• If using ADC through the Sensor Controller (ADC resource): Use Sensor Controller Studio 2.7.0 or later (release end of Q2 2020), or use the update service to install a patch for Sensor Controller Studio 2.0.0 through 2.6.0

Workaround 2:

Ensure that XOSC_HF is not turned on or off while the ADC is used.