米6体育平台手机版

SWRZ078C January 2018 – December 2020 CC1312R

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SYSCTRL_01

Resets occurring in a specific 2-MHz period during initial power up are incorrectly reported

Revisions Affected:

Revision E and earlier

Details:

If a reset occurs in a specific 2-MHz period during initial power-up (boot), the reset source in AON_PMCTL.RESETCTL.RESET_SRC is reported as PWR_ON regardless of the reset source. This means that there is a window of 0.5 μs during boot where a reset can be incorrectly reported.

Workaround:

None