SWRZ101B December 2021 – December 2023 AM2732 , AM2732-Q1
MibSPI: Spurious RX DMA REQ From a Peripheral Mode MibSPI
A spurious DMA request could be generated even when the SPI Peripheral is not transferring data in the following condition sequence:
The above sequence triggers a false request pulse on the Receive DMA Request as soon as the SPIEN bit is cleared from '1' to '0'.
Whenever disabling the SPI, by clearing the SPIEN bit (SPIGCR1.24), first clear the DMAREQEN bit (SPIINT0.16) to '0', and then, clear the SPIEN bit.