SWRZ132B September   2022  – December 2023 CC1354P10

PRODUCTION DATA  

  1.   1
  2.   Trademarks
  3. 1Advisories Matrix
  4. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development Support-Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  5. 3Advisories
    1.     Radio_01
    2.     Radio_02
    3. 3.1 Radio_05
    4.     Power_03
    5.     PKA_01
    6.     PKA_02
    7.     I2C_01
    8.     I2S_01
    9.     CPU_Sys_01
    10. 3.2 CPU_04
    11.     Sys_01
    12.     SYSCTRL_01
    13.     IOC_01
    14.     ADC_02
    15.     Flash_02
  6. 4Revision History

Flash bank erase may timeout when operating at low temperatures with a low VDDS supply voltage

Revisions Affected:

Revision C

Details:

A full flash bank (512kB) erase operation can timeout if executed near the following conditions:

  • Temperature of -40°C AND
  • VDDS of 1.8V

The amount of bits to be erased in bulk can exceed the flash pump current limit at those extremes.

Workarounds:

Reduce the effective size of the flash bank erase by partially protecting portions of the flash bank before attempting a new bank erase.
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