SWRZ149A July 2023 – August 2024 IWRL1432
PRODUCTION DATA
TOP_IO_MUX register space not accessible from RS232 for debug purposes
IWRL1432 ES1.1, ES2.0
RS232 is not able to write TOP_IO_MUX registers unless the space is programmed for user mode access.
It is recommended to use the following sequence:
From Processor or DAP : Unlock TOP_IO_MUX registers (by programming LPRADAR:TOP_IO_MUX:IOCFGKICK0 = 83E7 0B13h and LPRADAR:TOP_IO_MUX:IOCFGKICK1 = 95A4 F1E0h )
From Processor or DAP : Write to TOP_IO_MUX registers, LPRADAR:TOP_IO_MUX:USERMODEEN should be set to 0xADADADAD
Now TOP_IO_MUX registers can be accessed from RS232.
The below table shows the Register Addresses for above workaround.
Bits | Name | Address |
0:31 | LPRADAR:TOP_IO_MUX:IOCFGKICK0 | 0x5A000068 |
0:31 | LPRADAR:TOP_IO_MUX:IOCFGKICK | 0x5A00006C |
0:31 | LPRADAR:TOP_IO_MUX:USERMODEEN | 0x5A000060 |