SWRZ149A July   2023  – August 2024 IWRL1432

PRODUCTION DATA  

  1.   1
  2. 1Introduction
  3. 2Device Nomenclature
  4. 3Device Markings
  5. 4Advisory to Silicon Variant / Revision Map
  6. 5Known Design Exceptions to Functional Specifications
    1. 5.1  ANA #51
    2. 5.2  ANA #52
    3. 5.3  DIG #1
    4. 5.4  DIG #2
    5. 5.5  DIG #3
    6. 5.6  DIG #4
    7. 5.7  DIG #5
    8. 5.8  DIG #6
    9. 5.9  DIG #7
    10. 5.10 DIG #8
    11. 5.11 DIG #9
    12. 5.12 DIG #10
    13. 5.13 DIG #14
    14. 5.14 DIG #15
    15. 5.15 DIG #16
  7. 6Trademarks
  8.   Revision History

DIG #2

UART: UARTA cannot be used to wake up the sequencer from Deep Sleep Low Power Mode

Revision(s) Affected

IWRL1432 ES1.1

Details

Universal Asynchronous Receiver-Transmitter A (UART A) cannot be used to wake up the processor core from Deep-Sleep mode. Currently UART B interrupts are connected to Wake-up Interrupt Controller lines.

Workaround

It is recommended to use other wake-up sources ( Controller Area Network - Flexible Data-rate (CAN-FD)/ UARTB/ Serial Peripheral Interface(SPI))

This has been fixed in ES2.0.