ADC BUSY bit not cleared in repeat single, sequence, and repeat sequence conversion modes.
Description
When the ADC is configured in repeat single, sequence, or repeat sequence conversion modes with trigger policy as trigger next in the MEMCTLx register, software attempting to stop the conversion sequence by clearing the ENC bit does not clear the BUSY bit in the STATUS register. In the case of sequence conversion mode with trigger next policy, the BUSY bit is cleared at the end of the conversion sequence.Workaround
To stop the conversions and to clear the BUSY bit in the above-mentioned ADC operating scenario, the following software sequence can be followed.- Write CTL0.ENC = 0
- Change CTL1.TRIGSRC to SOFTWARE
- Write CTL1.SC=1
This workaround would be incorporated into future releases of SimpleLink™ Low Power F3 software development kit (SDK).