TIDUCJ0G November   2016  – April 2020

 

  1.   Revision History

Using CLA on C2000 MCU to Alleviate CPU Burden

The control law accelerator (CLA) is a co-processor available on the C2000 MCU family of devices. This co-processor enables offloading the control-ISR functions from the main C28x CPU core.

To run the control ISR on the CLA, for solutions supported in powerSUITE, selection is achieved through a drop-down menu on the powerSUITE SYSCFG page. The software structure of the powerSUITE solution is designed such that offloading the task to the CLA is simply a drop-down menu selection. The code is not duplicated and a single source for the solution algorithm is maintained, even when code is run on the CLA or the C28x. This configuration enables flexible debugging of the solution.

The CLA features vary slightly from device to device, for example, on the F2837xD, F2837xS, and F2807x the CLA can support only one task at a given time and there is no nesting capability, which means the task is not interruptible. Hence, realistically only one ISR can be offloaded to the CLA. On the F28004x, the CLA supports a background task from which a regular CLA task can nest. This configuration enables offloading two ISRs on the CLA.

Device-specific information:

  • F2837xD: The CLA tasks do not support nesting, hence only one ISR can be offloaded to the CLA. Therefore, only the faster ISR, which on this design runs at 50 kHz, is offloaded to the CLA. The 50-kHz ISR on the C28x CPU takes approximately 20% of CPU bandwidth, and for the instrumentation ISR (10 kHz) approximately 4% of CPU bandwidth is used. Thus, the total CPU use is 24%. With the CLA option, this CPU burden is reduced to 4%.
  • F28004x/F2838xD: The CLA supports a background task from which it can nest into a CLA task. This configuration allows offloading two ISR functions to the CLA. Hence, for the F28004x/F2838xD, both the control ISR (50 kHz) and instrumentation ISR (10 kHz) are offloaded to the CLA. On the F28004x, the CPU use is approximately 40% for the 50 kHz loop and 8% for the 10 kHz loop. Thus, the total CPU use is approximately 48%. With the CLA option, the CPU burden is reduced to 0% when both ISRs are offloaded to the CLA.

For more information on the CLA, visit the CLA Hands-On Workshop and the respective device technical reference manuals.