3.4.5 ± 5V Transmit Supply Generation

Figure 15 shows the schematic of the implementation of transmit ±5 V rail. The boost device TPS61178 boosts the USB voltage(4.25 V-5.5 V) to 5.7 V and LMZM23601 device which is set up in inverting buck mode generates -5.3 V. Both the positive and the negative outputs are fed to dual low noise TPS7A39 LDO to generate ±5 V @ maximum 150 mA per rail.

The device TPS61178 is also useful in the situation where high voltage requirement is high in the system say 100 V, or the system is power using 3.6 V (1S battery) source. This stage can be used as an intermediate input to the high-voltage circuit. This can be enabled by setting the required output voltage using the resistor divider (R138 and R142). Then removing R54 to disable existing USB input to HV circuit and placing R71, 0 ohm resistor as the input.

Figure 15. Schematic of the ±5V Transmit Circuit

The device TPS61178 also has a feature of true load disconnect (not implemented in the existing design). Placing an external P-FET between the output and the point of load, the device has a pin called DISDRV which can be used to turn off the FET in case of any short conditions. This feature is particularly useful when using an intermediate boost stage to power the high voltage circuit. The input to the high voltage circuit can be completely cut-off in case of any output short happens resulting in protection of the circuitry. The user can implement the same in their design providing a more robust system.Figure 16 shows the implementation of the load disconnect in TPS61178. For detailed information on the FET selection and other aspects, please refer to the Application and Implementation section of the device datasheet.

Figure 16. The Load Disconnect FET Connected in TPS61178