Figure 2-7 LMG2100 Functional Block Diagram

The LMG2100R026 device is an 93V continuous, 100V pulsed, 53A half-bridge power stage, with integrated gate-driver and enhancement-mode Gallium Nitride (GaN) FETs, 2.6mΩ R_DS(on).

• 5V external bias power supply
• Zero reverse recovery
• Very small input capacitance C_ISS and output capacitance C_OSS
• Internal bootstrap supply voltage clamping to prevent GaN FET overdrive
• Excellent propagation delay (33ns typical) and matching (2ns typical)
• Exposed top QFN package for top-side cooling
• Package optimized for easy PCB layout
• 7.0mm × 4.5mm × 0.89mm lead-free package

The device extends advantages of discrete GaN FETs by offering a more user-friendly interface. The device has a practical design for applications requiring high-frequency, high-efficiency operation in a small form factor.

The LMG2100R026, half-bridge, GaN power stage with highly integrated high-side and low-side gate drivers, includes built-in UVLO protection circuitry and an overvoltage clamp circuitry. The clamp circuitry limits the bootstrap refresh operation to make sure that the high-side gate driver overdrive does not exceed 5.4V. The device integrates two, 2.6mΩ GaN FETs in a half-bridge configuration. The device can be used in many isolated and non-isolated topologies allowing very simple integration. The HI and LI pins can be independently controlled to minimize the third quadrant conduction of the low-side FET for hard-switched buck converters. The package is designed to minimize the loop inductance while keeping the PCB design simple. TI recommends a small footprint MLCC to minimize trace length to the pin. Place the bypass and bootstrap capacitors as close as possible to the device to minimize parasitic inductance. The drive strengths for turn-on and turn-off are optimized to make sure high-voltage slew rates without causing much excessive ringing on the gate or power loop.