ZHCAD87A October 2023 – January 2024
以下是将器件配置到相应路径中的几个示例。这些器件配置可与外部主机或 Audio Precision 等仪表配合使用。要使用 EVM 的 AC_MB 主机进行测试,请使用 GUI 预设配置。这是因为 AC_MB 主机配置为仅支持 TDM,并且极性与这些器件不同。
用户可以复制以下设置并粘贴到 I2C 监控器窗口中,以在与外部主机/仪表一起使用时配置该器件。
此配置适用于以 48kHz 采样率、TDM 格式和 32 位深度进行差分音频录制 (ADC)。
##### Record AC-Couple Differential IN1-IN2 path ######
# Target Mode, TDM, 32 bit
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 10 50 # Configure DOUT as Primary ASI (PASI) DOUT
w a0 19 00 # 1 data input and 1 data output for PASI
w a0 1a 30 # PASI TDM, 32-bit format
w a0 1e 20 # PASI Ch1 on slot 0
w a0 1f 21 # PASI Ch2 on slot 1
w a0 00 01 # Set page 1
w a0 73 D0 # auto device, set MICBIAS = 9V
w a0 00 00 # Set page 0
w a0 50 00 # Auto device ADC Ch1 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 55 00 # Auto device ADC Ch2 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 76 c0 # Enable Input Ch1 and Ch2, disable output channels
w a0 78 a0 # Power up ADC and MICBIAS
此配置适用于以 48kHz 采样率、I2S 格式和 32 位深度进行单端音频录制 (ADC)。
##### Record AC-Couple Single-Ended IN1-IN2 path ######
# Target Mode, I2S, 32 bit
# Primary ASI only, multiple of 48KHz Sampling
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 10 50 # Configure DOUT as Primary ASI (PASI) DOUT
w a0 19 00 # 1 data input and 1 data output for PASI
w a0 1a 70 # PASI I2S, 32-bit format
w a0 1e 20 # PASI Ch1 on Left slot 0
w a0 1f 30 # PASI Ch2 on Right slot 0
w a0 00 01 # Set page 1
w a0 73 d0 # auto device, set MICBIAS = 9V
w a0 00 00 # Set page 0
w a0 50 40 # Auto device ADC Ch1 SE input, fixed 33.3KOhm, ac-coupled, audio band
w a0 55 40 # Auto device ADC Ch2 SE input, fixed 33.3KOhm, ac-coupled, audio band
w a0 76 c0 # Enable Input Ch1 and Ch2, disable output channels
w a0 78 a0 # Power up ADC and MICBIAS
使用 PASI 进行控制器模式差分交流耦合录制
此配置适用于以 48kHz 采样率、I2S 格式和 32 位深度以及 12.288MHz MCLK 进行差分音频录制 (ADC)。
##### Record AC-Couple Differential IN1-IN2 path ######
# Controller Mode, I2S, 32-bit, GPIO1 = CCLK from BCLK2 @ 12.288 MHz
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 0a 10 # configure GPIO1 as input
w a0 0f 20 # Set GPIO1=CCLK
w a0 10 50 # Configure DOUT as Primary ASI (PASI) DOUT
w a0 19 00 # 1 data input and 1 data output for PASI
w a0 1a 70 # PASI I2S, 32-bit format
w a0 1e 20 # PASI Ch1 on Left slot 0
w a0 1f 30 # PASI Ch2 on Right slot 0
w a0 32 50 # PASI Fs=48KHz with auto clock configuration
w a0 34 48 # PLL always enabled with fractional allowed and from fixed clk frequency
w a0 37 30 # Use MCLK=12.288 MHz, PASI in controller mode
w a0 38 80 # Use internal BCLK for FSYNC generation in controller mode
w a0 39 40 # Set controller mode BCLK/FSYNC ratio to 64 = h40
w a0 00 01 # Set page 1
w a0 73 d0 # auto device, set MICBIAS = 9V
w a0 00 00 # Set page 0
w a0 50 00 # Auto device ADC Ch1 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 55 00 # Auto device ADC Ch2 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 76 c0 # Enable Input Ch1 and Ch2, disable output channels
w a0 78 a0 # Power up ADC and MICBIAS
此配置适用于通过 2 个数字麦克风以 48kHz 采样率、I2S 格式和 32 位深度进行音频录制 (ADC)。
##### Record from DMIC Test ######
# Target Mode, I2S, 32-bit
# Primary ASI only, multiple of 48 kHz Sampling 5 x 5-Q1
# PDMCLK=GPIO1, PDM Data=GPI1
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 0a 41 # Configure GPIO1 as PDMCLK with drive active high and low
w a0 0d 02 # Configure GPI1 as input
w a0 10 50 # Configure DOUT as Primary ASI (PASI) DOUT
w a0 13 cc # PDM ch 1 data latched on negative edge and ch 2 data latched on positive edge
w a0 19 00 # 1 data input and 1 data output for PASI
w a0 1a 70 # PASI I2S, 32-bit format
w a0 1e 20 # PASI Ch1 on Left slot 0
w a0 1f 30 # PASI Ch2 on Right slot 0
w a0 35 00 # PDM_CLK is 2.8224 MHz or 3.072 MHz
w a0 76 c0 # Enable input Chl and Ch2, disable output channels
w a0 78 80 # Power up ADC
此配置适用于以 48kHz 采样率、TDM 格式和 32 位深度进行差分音频录制 (ADC)。
##### Record AC-Couple Differential IN1-IN2 path ######
# Target Mode, TDM, 32 bit
# Secondary ASI only, multiple of 48 kHz Sampling
# GPI2A=Secondary FSYNC, GPIO1=Secondary BCLK, GPO1A=Secondary DOUT, GPI1A=Secondary DIN for 5x5-Q1
#
w a0 00 00 # Sets page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 0a 10 # GPIO1 as input
w a0 0d 03 # GPI1 and GPI2 as input
w a0 0c 70 # GPO1 as Secondary DOUT
w a0 11 22 # Set GPI2A as Secondary FSYNC and GPIO1 as Secondary BCLK
w a0 12 60 # Set GPI1A as Secondary DIN
w a0 18 80 # Disable Primary ASI
w a0 34 44 # SASI BCLK is the input clock source
w a0 00 03 # Sets page 3
w a0 1e 20 # SASI Ch1 on slot 0
w a0 1f 21 # SASI Ch2 on slot 1
w a0 00 01 # Set page 1
w a0 73 d0 # auto device, set MICBIAS = 9V
w a0 00 00 # Sets page 0
w a0 50 00 # Auto device ADC Ch1 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 55 00 # Auto device ADC Ch2 diff input, fixed 33.3KOhm, 10Vrms ac-coupled, audio band
w a0 76 C0 # Enable Input Ch1 and Ch2, disable output channels
w a0 78 A0 # Power up ADC and MICBIAS
此配置适用于以 48kHz 采样率、I2S 格式和 32 位深度进行差分音频录制 (ADC)。
##### Record DC-Couple IN1-IN2 path ######
# Target Mode, I2S, 32 bit
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 10 50 # Configure DOUT as Primary ASI (PASI) DOUT
w a0 19 00 # 1 data input and 1 data output for PASI
w a0 1a 70 # PASI I2S, 32-bit format
w a0 1e 20 # PASI Ch1 on Left slot 0
w a0 1f 30 # PASI Ch2 on Right slot 0
w a0 00 01 # Set page 1
w a0 73 d0 # auto device, set MICBIAS = 9V
w a0 00 00 # Set page 0
w a0 50 04 # Auto device ADC Ch1 DIFF input, fixed 33.3KOhm, ac/dc-coupled, audio band
w a0 55 04 # Auto device ADC Ch2 DIFF input, fixed 33.3KOhm, ac/dc-coupled, audio band
w a0 76 c0 # Enable Input Ch1 and Ch2, disable output channels
w a0 78 a0 # Power up ADC and MICBIAS
此配置适用于以 48kHz 采样率、TDM 格式和 32 位深度进行差分音频播放 (DAC)。
##### Playback Differential LINEOUT Path ######
# Target Mode, TDM, 32 bit
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 11 80 # Enable PASI DIN
w a0 19 00 # 1 data inputs and 1 data outputs for PASI
w a0 1a 30 # PASI TDM, 32-bit format
w a0 28 20 # PASI DIN Ch1 on TDM slot 0
w a0 29 21 # PASI DIN Ch2 on TDM slot 1
w a0 64 20 # Configure OUT1P/M as differential from DAC1
w a0 65 20 # Configure OUT1P LINEOUT 0dB audio band
w a0 66 20 # Configure OUT1M LINEOUT 0dB 2Vrms Differential
w a0 6b 20 # Configure OUT2P/M as differential from DAC2
w a0 6c 20 # Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20 # Configure OUT2M LINEOUT 0dB 2Vrms Differential
w a0 76 0c # Disable all input channels and enable output channel 1 and 2
w a0 78 40 # Power up all DAC channel
此配置适用于以 48kHz 采样率、TDM 格式和 32 位深度进行单端单声道音频播放 (DAC)。
##### Playback Single-Ended Mono LINEOUT Path ######
# Target Mode, TDM, 32 bit
# Primary ASI only, multiple of 48 kHz Sampling
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 11 80 # Enable PASI DIN
w a0 19 00 # 1 data inputs and 1 data outputs for PASI
w a0 1a 30 # PASI TDM, 32-bit format
w a0 28 20 # PASI DIN Ch1 on TDM slot 0
w a0 29 21 # PASI DIN Ch2 on TDM slot 1
w a0 64 28 # Configure OUT1P as mono single-ended from DAC1
w a0 65 20 # Configure OUT1P LINEOUT 0dB audio band
w a0 66 20 # Configure 2Vrms Differential
w a0 6b 28 # Configure OUT2P as mono single-ended from DAC2
w a0 6c 20 # Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20 # Configure 2Vrms Differential
w a0 76 0c # Disable all input channels and enable output channel 1 and 2
w a0 78 40 # Power up all DAC channel
此配置适用于以 48kHz 采样率、TDM 格式和 32 位深度进行差分音频播放 (DAC)。
##### Playback Differential LINEOUT Path ######
# Target Mode, TDM, 32 bit
# Secondary ASI only, multiple of 48 kHz Sampling
# GPI2A = Secondary FSYNC, GPIO1 = Secondary BCLK, GPI1A = Secondary DIN, GPO1A=Secondary DOUT for 5x5-Q1
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 0a 10 # GPIO1 as input
w a0 0d 03 # GPI1 and GPI2 as input
w a0 0c 70 # GPO1 as Secondary DOUT
w a0 11 22 # Set GPI2A as Secondary FSYNC and GPIO1 as Secondary BCLK
w a0 12 60 # Set GPI1A as Secondary DIN
w a0 18 80 # Disable Primary ASI
w a0 34 44 # SASI BCLK is the input clock source
w a0 19 00 # 1 data input and 1 data output for SASI
w a0 00 03 # Set page 3
w a0 1a 30 # SASI TDM, 32 bit format
w a0 28 20 # SASI DIN Ch1 on TDM slot 0
w a0 29 21 # SASI DIN Ch2 on TDM slot 1
w a0 00 00 # Set page 0
w a0 64 20 # Configure OUT1P/M as differential from DAC1
w a0 65 20 # Configure OUT1P LINEOUT 0dB audio band
w a0 66 20 # Configure OUT1M LINEOUT 0dB 2Vrms Differential
w a0 6b 20 # Configure OUT2P/M as differential from DAC2
w a0 6c 20 # Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20 # Configure OUT2M LINEOUT 0dB 2Vrms Differential
w a0 76 0c # Disable all input channels and enable output channel 1 and 2
w a0 78 40 # Power up all DAC channels
此配置适用于以 44.1kHz 采样率、TDM 格式和 32 位深度以及 12.288MHz MCLK 进行差分音频播放 (DAC)。
##### Playback Differential LINEOUT Path ######
# Controller Mode MCLK = 12.288 MHz, TDM, 32-bit
# Secondary ASI only, multiple of 44.1 kHz Sampling
# GPIO1=Secondary FSYNC, GPI2A=CCLK Input, GPI1A=Secondary DIN, GPO1A=Secondary BCLK for 5 x 5 - Q1
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 0a a0 # GPIO1 as Secondary FSYNC output
w a0 0d 03 # GPI1 and GPI2 as input
w a0 0c 90 # GPO1A as Secondary BCLK output
w a0 0f 40 # GPI2A as CCLK input
w a0 11 14 # GPIO1 as Secondary FSYNC
w a0 12 60 # Set GPI1A as Secondary DIN
w a0 18 80 # Disable Primary ASI
w a0 32 00 # Auto clock configuration
w a0 33 50 # SASI Fs = 48 kHz (41895-49440) with Auto clock configuration
w a0 34 48 # PLL always enabled with fractional allowed and from fixed clk frequency
w a0 36 00 # auto detect the ratio
w a0 37 29 # Use MCLK=12.288 MHz, SASI in controller configuration with rate multiple of 44.1 kHz
w a0 3a 81 # Use internal BCLK for FSYNC generation for SASI, BCLK/FSYNC ratio=256
w a0 3b 00 # use BCLK/FSYNC ratio of 256 for SASI
w a0 00 03 # Set page 3
w a0 1a 30 # SASI TDM, 32 bit format
w a0 28 20 # SASI DIN Ch1 on TDM slot 0
w a0 29 21 # SASI DIN Ch2 on TDM slot 1
w a0 00 00 # Set page 0
w a0 64 20 # Configure OUT1P/M as differential from DAC1
w a0 65 20 # Configure OUT1P LINEOUT 0dB audio band
w a0 66 20 # Configure OUT1M LINEOUT 0dB 2Vrms Differential
w a0 6b 20 # Configure OUT2P/M as differential from DAC2
w a0 6c 20 # Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20 # Configure OUT2M LINEOUT 0dB 2Vrms Differential
w a0 76 0c # Disable all input channels and enable output channel 1 and 2
w a0 78 40 # Power up all DAC channels
此配置适用于以 48kHz 采样率、I2S 格式和 32 位深度进行差分音频播放 (DAC)。
##### Playback Differential Headphone Path ######
# Target Mode, I2S, 32-bit
# Primary ASI only, multiple of 48 kHz Sampling
# Playback through Stereo OUT1P and OUT2P for Headphone
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 11 80 # Enable PASI DIN
w a0 19 00 # 1 data input and 1 data output for PASI
w a0 1a 70 # PASI I2S, 32 bit format
w a0 28 20 # PASI DIN Ch1 on Left slot 0
w a0 29 30 # PASI DIN Ch2 on Right slot 0
w a0 64 20 # Configure OUT1P/M as differential from DAC1
w a0 65 60 # Configure OUT1P as Headphone 0dB audio band
w a0 66 60 # Configure OUT1M as Headphone 0dB audio band
w a0 6b 20 # Configure OUT2P/M as differential from DAC2
w a0 6c 60 # Configure OUT2P as Headphone 0dB audio band
w a0 6d 60 # Configure OUT2M as Headphone 0dB audio band
w a0 76 0c # Enable output channel 1 and 2 and disable all input channels
w a0 78 40 # Power up DAC channel
此配置适用于以 48kHz 采样率、I2S 格式和 16 位深度进行单声道单端音频播放 (DAC)。
##### Playback Single-Ended Headphone Path ######
# Target Mode, I2S, 16 bit
# Primary ASI only, multiple of 48 kHz Sampling
# Playback through mono OUT1P and OUT2P for Headphone
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 11 80 # Enable PASI DIN
w a0 19 00 # 1 data input and 1 data output for PASI
w a0 1a 40 # PASI I2S, 16-bit format
w a0 28 20 # PASI DIN Ch1 on Left slot 0
w a0 29 30 # PASI DIN Ch2 on Right slot 0
w a0 64 28 # Configure OUT1P as mono single-ended from DAC1
w a0 65 60 # Configure OUT1P as Headphone 0dB audio band
w a0 66 60 # Configure 2Vrms Differential
w a0 6b 28 # Configure OUT2P as mono single-ended from DAC2
w a0 6c 60 # Configure OUT2P as Headphone 0dB audio band
w a0 6d 60 # Configure 2Vrms Differential
w a0 76 0c # Enable output channel 1 and 2 and disable all input channels
w a0 78 40 # Power up DAC channel
该配置会启用输入诊断测试;用户从通道 1 的 B0_P1_R54 和通道 2 的 B0_P1_R55 读取故障检测状态。
##### Diagnostic Setting ######
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 50 08 # Device set to DC mode
w a0 00 01 # Set page 1
w a0 73 d0 # Set MICBIAS = 9V
w a0 46 80 # Enable IN1P and IN1M Scan for diagnostic
w a0 47 00 # Input terminal short and VBAT_In short threshold 0mV
w a0 48 12 # short to GND and to MICBIAS threshold 60mV
w a0 4a b0 # 16 counts for debounce to filter out false fault detection
w a0 4b 40 # Enable moving average with 0.5 weightage
w a0 00 00 # Set page 0
w a0 76 c0 # Enable ADC channel 1 and channel 2
w a0 78 a0 # Power up ADC and MICBIAS