ZHCS264E MAY   2011  – July 2018 TPS51206

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化应用
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VTT Sink and Source Regulator
      2. 7.3.2 VTTREF
      3. 7.3.3 VDD Undervoltage Lockout Protection
      4. 7.3.4 VTT Current Limit
      5. 7.3.5 Overtemperature Protection
      6. 7.3.6 Power On and Off Sequence
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power State Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 VLDOIN = VDDQ Configuration
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 VDD Capacitor
          2. 8.2.1.2.2 VLDOIN Capacitor
          3. 8.2.1.2.3 VTTREF Capacitor
          4. 8.2.1.2.4 VTT Capacitor
          5. 8.2.1.2.5 VTTSNS Connection
          6. 8.2.1.2.6 VDDQSNS Connection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 VLDOIN Separated from VDDQ Configuration
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 第三方米6体育平台手机版_好二三四免责声明
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

6.5 Electrical Characteristics

Over operating free-air temperature range, VVDD = 5 V, VLDOIN is connected to VDDQSNS, VS3 = VS5 = 5 V (unless otherwise noted)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
SUPPLY CURRENT
IVDD(S0) VDD supply current, in S0 TA = 25°C, No load, VS3 = VS5 = 5 V, VVDDQSNS = 1.8 V 170 μA
IVDD(S3) VDD supply current, in S3 TA = 25°C, No load, VS3 = 0 V, VS5 = 5 V, VVDDQSNS = 1.8 V 80 μA
IVDDSDN VDD shutdown current, in S4 and S5 TA = 25°C, No load, VS3 = VS5 = 0 V, VVDDQSNS = 1.8 V 1 μA
IVLDOIN(S0) VLDOIN supply current, in S0 TA = 25°C, No load, VS3 = VS5 = 5 V,
VLDION = 1.8 V		 5 μA
IVLDOIN(s3) VLDOIN supply current, in S3 TA = 25°C, No load, VS3 = 0 V, VS5 = 5 V, VLDION = 1.8 V 5 μA
IVLDOINSDN VLDOIN shutdown current, in S4 and S5 TA = 25°C, No load, VS3 = VS5 = 0 V,
VLDION = 1.8 V		 5 μA
VTTREF OUTPUT
VVTTREF Output voltage VVDDQSNS/2 V
VVTTREFTOL Output voltage tolerance to VVDDQSNS |IVTTREF|≤ 10 mA, 1.5 V ≤ VVDDQSNS ≤ 1.8 V 49% 51%
|IVTTREF|≤ 10 mA, 1.2 V ≤ VVDDQSNS < 1.5 V 48.75% 51.25%
|IVTTREF|≤ 100 μA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V 49% 51%
IVTTREFSRC Source current VVDDQSNS = 1.8 V, VVTTREF = 0 V 10 mA
IVTTREFSNK Sink current VVDDQSNS = 0 V, VVTTREF = 1.8 V 10 mA
IVTTREFDIS VTTREF Discharge current TA = 25°C, VS3 = VS5 = 0V, VVTTREF = 0.5 V 1.3 mA
VTT OUTPUT
VVTT Output voltage VVDDQSNS/2 V
VVTTTOL Output voltage tolerance to VVDDQSNS/2 |IVTT|≤ 10 mA, 1.4 V ≤ VVDDQSNS ≤ 1.8 V –20 20 mV
|IVTT|< 1 A, 1.4 V ≤ VVDDQSNS ≤ 1.8 V(1) –30 30
|IVTT| < 2 A, 1.4 V ≤ VVDDQSNS ≤ 1.8 V(1) –40 40
|IVTT|≤ 10 mA, 1.2 V ≤ VVDDQSNS ≤ 1.4 V –20 20
|IVTT| < 1 A, 1.2 V ≤ VVDDQSNS ≤ 1.4 V(1) –30 30
|IVTT|< 1.5 A, 1.2 V ≤ VVDDQSNS < 1.4 V(1) –40 40
IVTTOCLSRC Source current limit VVDDQSNS = 1.8 V, VVTT = VVTTSNS = 0.7 V 2 A
IVTTOCLSNK Sink current limit VVDDQSNS = 1.8 V, VVTT = VVTTSNS = 1.1 V 2 A
IVTTLK Leakage current TA = 25°C , VS3 = 0 V, VS5 = 5 V,
VVTT = VVTTREF 		5 μA
IVTTSNSBIAS VTTSNS input bias current VS3 = 5 V, VS5 = 5 V, VVTTSNS = VVTTREF –0.1 0.1 μA
IVTTSNSLK VTTSNS leakage current VS3 = 0 V, VS5 = 5 V, VVTTSNS = VVTTREF –0.1 0.1 μA
IVTTDIS VTT Discharge current TA = 25°C, VS3 = VS5 = VVDDQSNS = 0 V,
VVTT = 0.5 V		 7 mA
VDDQ INPUT
IVDDQSNS VDDQSNS input current VVDDQSNS = 1.8 V 30 μA
UVLO/LOGIC THRESHOLD
VVDDUV VDD UVLO threshold voltage Wake up 2.67 2.90 3.00 V
Hysteresis 0.2
VLL S3 and S5 low-level voltage 0.5 V
VLH S3 and S5 high-level voltage 1.8 V
VLHYST S3 and S5 hysteresis voltage 0.3 V
ILHLK S3 and S5 input leak current –1 1 μA
OVER-TEMPERATURE PROTECTION
TOTP Over temperature protection Shutdown temperature(1) 150 °C
Hysteresis(1) 10
(1) Ensured by design. Not production tested.
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